Lines Matching refs:M68k

58   addRegisterClass(MVT::i8, &M68k::DR8RegClass);  in M68kTargetLowering()
59 addRegisterClass(MVT::i16, &M68k::XR16RegClass); in M68kTargetLowering()
60 addRegisterClass(MVT::i32, &M68k::XR32RegClass); in M68kTargetLowering()
198 return M68k::D0; in getExceptionPointerRegister()
203 return M68k::D1; in getExceptionSelectorRegister()
335 if ((Opcode == M68k::LEA32p || Opcode == M68k::LEA32f) && in MatchingStackOffset()
853 if (M68k::isCalleePop(CallConv, IsVarArg, in LowerCall()
950 RC = &M68k::XR32RegClass; in LowerFormalArguments()
1043 if (M68k::isCalleePop(CCID, IsVarArg, in LowerFormalArguments()
1153 unsigned RetValReg = M68k::D0; in LowerReturn()
1342 case M68k::A0: in IsEligibleForTailCallOptimization()
1343 case M68k::A1: in IsEligibleForTailCallOptimization()
1356 bool CalleeWillPop = M68k::isCalleePop( in IsEligibleForTailCallOptimization()
1580 CC = M68k::COND_VS; in lowerOverflowArithmetic()
1584 CC = M68k::COND_CS; in lowerOverflowArithmetic()
1588 CC = M68k::COND_VS; in lowerOverflowArithmetic()
1592 CC = M68k::COND_CS; in lowerOverflowArithmetic()
1598 CC = M68k::COND_VS; in lowerOverflowArithmetic()
1604 CC = M68k::COND_VS; in lowerOverflowArithmetic()
1669 M68k::CondCode Cond = CC == ISD::SETEQ ? M68k::COND_NE : M68k::COND_EQ; in getBitTestCondition()
1723 static M68k::CondCode TranslateIntegerM68kCC(ISD::CondCode SetCCOpcode) { in TranslateIntegerM68kCC()
1728 return M68k::COND_EQ; in TranslateIntegerM68kCC()
1730 return M68k::COND_GT; in TranslateIntegerM68kCC()
1732 return M68k::COND_GE; in TranslateIntegerM68kCC()
1734 return M68k::COND_LT; in TranslateIntegerM68kCC()
1736 return M68k::COND_LE; in TranslateIntegerM68kCC()
1738 return M68k::COND_NE; in TranslateIntegerM68kCC()
1740 return M68k::COND_CS; in TranslateIntegerM68kCC()
1742 return M68k::COND_CC; in TranslateIntegerM68kCC()
1744 return M68k::COND_HI; in TranslateIntegerM68kCC()
1746 return M68k::COND_LS; in TranslateIntegerM68kCC()
1761 return M68k::COND_PL; in TranslateM68kCC()
1765 return M68k::COND_MI; in TranslateM68kCC()
1770 return M68k::COND_LE; in TranslateM68kCC()
1807 return M68k::COND_EQ; in TranslateM68kCC()
1811 return M68k::COND_HI; in TranslateM68kCC()
1815 return M68k::COND_CC; in TranslateM68kCC()
1819 return M68k::COND_CS; in TranslateM68kCC()
1823 return M68k::COND_LS; in TranslateM68kCC()
1826 return M68k::COND_NE; in TranslateM68kCC()
1829 return M68k::COND_INVALID; in TranslateM68kCC()
1877 case M68k::COND_HI: in EmitTest()
1878 case M68k::COND_CC: in EmitTest()
1879 case M68k::COND_CS: in EmitTest()
1880 case M68k::COND_LS: in EmitTest()
1883 case M68k::COND_GT: in EmitTest()
1884 case M68k::COND_GE: in EmitTest()
1885 case M68k::COND_LT: in EmitTest()
1886 case M68k::COND_LE: in EmitTest()
1887 case M68k::COND_VS: in EmitTest()
1888 case M68k::COND_VC: { in EmitTest()
1955 if ((M68kCC == M68k::COND_EQ || M68kCC == M68k::COND_NE) && in EmitTest()
2087 case M68k::COND_EQ: in isM68kCCUnsigned()
2088 case M68k::COND_NE: in isM68kCCUnsigned()
2089 case M68k::COND_CS: in isM68kCCUnsigned()
2090 case M68k::COND_HI: in isM68kCCUnsigned()
2091 case M68k::COND_LS: in isM68kCCUnsigned()
2092 case M68k::COND_CC: in isM68kCCUnsigned()
2094 case M68k::COND_GT: in isM68kCCUnsigned()
2095 case M68k::COND_GE: in isM68kCCUnsigned()
2096 case M68k::COND_LT: in isM68kCCUnsigned()
2097 case M68k::COND_LE: in isM68kCCUnsigned()
2173 M68k::CondCode CCode = (M68k::CondCode)Op0.getConstantOperandVal(0); in LowerSETCC()
2178 CCode = M68k::GetOppositeBranchCondition(CCode); in LowerSETCC()
2200 if (M68kCC == M68k::COND_INVALID) in LowerSETCC()
2217 M68k::CondCode CC = TranslateIntegerM68kCC(cast<CondCodeSDNode>(Cond)->get()); in LowerSETCCCARRY()
2285 (CondCode == M68k::COND_EQ || CondCode == M68k::COND_NE)) { in LowerSELECT()
2293 (isAllOnesConstant(Op1) == (CondCode == M68k::COND_NE))) { in LowerSELECT()
2302 DAG.getConstant(M68k::COND_CS, DL, MVT::i8), in LowerSELECT()
2312 DAG.getConstant(M68k::COND_CS, DL, MVT::i8), Cmp); in LowerSELECT()
2314 if (isAllOnesConstant(Op1) != (CondCode == M68k::COND_EQ)) in LowerSELECT()
2370 CC = DAG.getConstant(M68k::COND_NE, DL, MVT::i8); in LowerSELECT()
2371 Cond = EmitTest(Cond, M68k::COND_NE, DL, DAG); in LowerSELECT()
2381 if ((CondCode == M68k::COND_CC || CondCode == M68k::COND_CS) && in LowerSELECT()
2386 DAG.getConstant(M68k::COND_CS, DL, MVT::i8), Cond); in LowerSELECT()
2387 if (isAllOnesConstant(Op1) != (CondCode == M68k::COND_CS)) in LowerSELECT()
2433 return (M68k::IsSETCC(Op.getOperand(0).getOpcode()) && in isAndOrOfSetCCs()
2435 M68k::IsSETCC(Op.getOperand(1).getOpcode()) && in isAndOrOfSetCCs()
2498 case M68k::COND_VS: in LowerBRCOND()
2499 case M68k::COND_CS: in LowerBRCOND()
2515 CCode = M68k::GetOppositeBranchCondition((M68k::CondCode)CCode); in LowerBRCOND()
2543 M68k::CondCode CCode = in LowerBRCOND()
2544 (M68k::CondCode)Cond.getOperand(0).getConstantOperandVal(0); in LowerBRCOND()
2545 CCode = M68k::GetOppositeBranchCondition(CCode); in LowerBRCOND()
2561 M68k::CondCode CCode = in LowerBRCOND()
2562 (M68k::CondCode)Cond.getOperand(1).getConstantOperandVal(0); in LowerBRCOND()
2563 CCode = M68k::GetOppositeBranchCondition(CCode); in LowerBRCOND()
2574 M68k::CondCode CCode = in LowerBRCOND()
2575 (M68k::CondCode)Cond.getOperand(0).getConstantOperandVal(0); in LowerBRCOND()
2576 CCode = M68k::GetOppositeBranchCondition(CCode); in LowerBRCOND()
2599 M68k::CondCode MxCond = Inverted ? M68k::COND_EQ : M68k::COND_NE; in LowerBRCOND()
3018 return std::make_pair(0U, &M68k::DR8RegClass); in getRegForInlineAsmConstraint()
3020 return std::make_pair(0U, &M68k::DR16RegClass); in getRegForInlineAsmConstraint()
3022 return std::make_pair(0U, &M68k::DR32RegClass); in getRegForInlineAsmConstraint()
3030 return std::make_pair(0U, &M68k::AR16RegClass); in getRegForInlineAsmConstraint()
3032 return std::make_pair(0U, &M68k::AR32RegClass); in getRegForInlineAsmConstraint()
3047 bool M68k::isCalleePop(CallingConv::ID CC, bool IsVarArg, bool GuaranteeTCO) { in isCalleePop()
3056 case M68k::CMOV8d: in isCMOVPseudo()
3057 case M68k::CMOV16d: in isCMOVPseudo()
3058 case M68k::CMOV32r: in isCMOVPseudo()
3078 if (mi.readsRegister(M68k::CCR, /*TRI=*/nullptr)) in checkAndUpdateCCRKill()
3080 if (mi.definesRegister(M68k::CCR, /*TRI=*/nullptr)) in checkAndUpdateCCRKill()
3088 if (SBB->isLiveIn(M68k::CCR)) in checkAndUpdateCCRKill()
3093 SelectItr->addRegisterKilled(M68k::CCR, TRI); in checkAndUpdateCCRKill()
3157 M68k::CondCode CC = M68k::CondCode(MI.getOperand(3).getImm()); in EmitLoweredSelect()
3158 M68k::CondCode OppCC = M68k::GetOppositeBranchCondition(CC); in EmitLoweredSelect()
3193 Jcc1MBB->addLiveIn(M68k::CCR); in EmitLoweredSelect()
3211 if (!LastCCRSUser->killsRegister(M68k::CCR, /*TRI=*/nullptr) && in EmitLoweredSelect()
3213 Copy0MBB->addLiveIn(M68k::CCR); in EmitLoweredSelect()
3214 SinkMBB->addLiveIn(M68k::CCR); in EmitLoweredSelect()
3239 unsigned Opc = M68k::GetCondBranchFromCond(CC); in EmitLoweredSelect()
3243 unsigned Opc2 = M68k::GetCondBranchFromCond( in EmitLoweredSelect()
3244 (M68k::CondCode)CascadedCMOV->getOperand(3).getImm()); in EmitLoweredSelect()
3288 BuildMI(*SinkMBB, SinkInsertionPoint, DL, TII->get(M68k::PHI), DestReg) in EmitLoweredSelect()
3329 case M68k::CMOV8d: in EmitInstrWithCustomInserter()
3330 case M68k::CMOV16d: in EmitInstrWithCustomInserter()
3331 case M68k::CMOV32r: in EmitInstrWithCustomInserter()
3333 case M68k::SALLOCA: in EmitInstrWithCustomInserter()
3530 static SDValue getSETCC(M68k::CondCode Cond, SDValue CCR, const SDLoc &dl, in getSETCC()
3551 if (Carry.getConstantOperandVal(0) == M68k::COND_CS) in combineCarryThroughADD()
3563 static SDValue combineSetCCCCR(SDValue CCR, M68k::CondCode &CC, in combineSetCCCCR()
3566 if (CC == M68k::COND_CS) in combineSetCCCCR()
3577 M68k::CondCode CC = M68k::CondCode(N->getConstantOperandVal(0)); in combineM68kSetCC()
3589 M68k::CondCode CC = M68k::CondCode(N->getConstantOperandVal(2)); in combineM68kBrCond()