Home
last modified time | relevance | path

Searched refs:Instructions (Results 1 – 25 of 291) sorted by relevance

12345678910>>...12

/freebsd/contrib/llvm-project/llvm/include/llvm/DebugInfo/DWARF/LowLevel/
H A DDWARFCFIProgram.h61 iterator begin() { return Instructions.begin(); } in begin()
62 const_iterator begin() const { return Instructions.begin(); } in begin()
63 iterator end() { return Instructions.end(); } in end()
64 const_iterator end() const { return Instructions.end(); } in end()
66 unsigned size() const { return (unsigned)Instructions.size(); } in size()
67 bool empty() const { return Instructions.empty(); } in empty()
199 Instructions.back().Expression = in parse()
215 Instructions.back().Expression = in parse()
226 void addInstruction(const Instruction &I) { Instructions.push_back(I); } in addInstruction()
259 Instructions.push_back(Instruction(Opcode)); in addInstruction()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVScheduleV.td283 // 6. Configuration-Setting Instructions
289 // 7.4. Vector Unit-Stride Instructions
295 // 7.5. Vector Strided Instructions
304 // 7.6. Vector Indexed Instructions
323 // 7.8. Vector Segment Instructions
337 // 7.9. Vector Whole Register Instructions
347 // 11. Vector Integer Arithmetic Instructions
349 // 11.5. Vector Bitwise Logical Instructions
359 // 11.4. Vector Integer Arithmetic with Carry or Borrow Instructions
366 // 11.6. Vector Single-Width Bit Shift Instructions
[all …]
H A DRISCVFeatures.td85 : RISCVExtension<1, 0, "Cache-Block Management Instructions">;
88 "'Zicbom' (Cache-Block Management Instructions)">;
91 : RISCVExtension<1, 0, "Cache-Block Prefetch Instructions">;
94 "'Zicbop' (Cache-Block Prefetch Instructions)">;
97 : RISCVExtension<1, 0, "Cache-Block Zero Instructions">,
101 "'Zicboz' (Cache-Block Zero Instructions)">;
185 "Load/Store Pair Instructions">,
224 : RISCVExtension<2, 1, "Atomic Instructions",
229 "'A' (Atomic Instructions)">;
253 : RISCVExtension<1, 0, "Atomic Compare-And-Swap Instructions",
[all …]
H A DRISCVInstrInfoV.td107 // `forceMasked` Forced to be masked (e.g. Add-with-Carry Instructions).
1065 // Instructions
1088 // Vector Unit-Stride Instructions
1095 // Vector Strided Instructions
1143 // Refer to 11.2 Widening Vector Arithmetic Instructions
1183 // Vector Integer Add-with-Carry / Subtract-with-Borrow Instructions
1194 // Vector Bitwise Logical Instructions
1204 // Vector Single-Width Bit Shift Instructions
1209 // Vector Narrowing Integer Right Shift Instructions
1210 // Refer to 11.3. Narrowing Vector Arithmetic Instructions
[all …]
/freebsd/contrib/llvm-project/llvm/lib/MCA/Stages/
H A DEntryStage.cpp42 Instructions.emplace_back(std::move(Inst)); in getNextInstruction()
70 auto Range = drop_begin(Instructions, NumRetired); in cycleEnd()
75 NumRetired = std::distance(Instructions.begin(), It); in cycleEnd()
77 if ((NumRetired * 2) >= Instructions.size()) { in cycleEnd()
78 Instructions.erase(Instructions.begin(), It); in cycleEnd()
/freebsd/contrib/llvm-project/llvm/lib/Analysis/
H A DStackLifetime.cpp52 auto It = std::upper_bound(Instructions.begin() + ItBB->getSecond().first + 1, in isAliveAfter()
53 Instructions.begin() + ItBB->getSecond().second, I, in isAliveAfter()
58 unsigned InstNum = It - Instructions.begin(); in isAliveAfter()
123 LLVM_DEBUG(dbgs() << " " << Instructions.size() << ": BB " << BB->getName() in collectMarkers()
125 auto BBStart = Instructions.size(); in collectMarkers()
126 Instructions.push_back(nullptr); in collectMarkers()
133 BlockInstRange[BB] = std::make_pair(BBStart, Instructions.size()); in collectMarkers()
138 LLVM_DEBUG(dbgs() << " " << Instructions.size() << ": " in collectMarkers()
142 BBMarkers[BB].push_back({Instructions.size(), M}); in collectMarkers()
143 Instructions.push_back(I); in collectMarkers()
[all …]
/freebsd/contrib/llvm-project/llvm/tools/llvm-mca/
H A DCodeRegion.h83 llvm::SmallVector<llvm::MCInst, 16> Instructions; variable
98 Instructions.emplace_back(Instruction); in addInstruction()
106 return Instructions; in dropInstructions()
107 llvm::erase_if(Instructions, [&Insts](const llvm::MCInst &Inst) { in dropInstructions()
110 return Instructions; in dropInstructions()
117 bool empty() const { return Instructions.empty(); } in empty()
120 llvm::ArrayRef<llvm::MCInst> getInstructions() const { return Instructions; } in getInstructions()
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYInstrFormats.td67 // Instructions(7): grs, lrs32.b, lrs32.h, lrs32.w, srs32.b, srs32.h, srs32.w
78 // Instructions(1): ori32
92 // Instructions(3): movi32, movih32, (bgeni32)
108 // Instructions(1): lrw32
120 // Instructions(5): bt32, bf32, br32, jmpi32, jsri32
130 // Instructions(2): jmp32, jsr32
142 // Instructions(1): jmpix32
156 // Instructions(1): rts32
169 // Instructions(3): cmpnei32, cmphsi32, cmplti32
182 // Instructions(7): bez32, bnez32, bnezad32, bhz32, blsz32, blz32, bhsz32
[all …]
/freebsd/contrib/llvm-project/clang/include/clang/Basic/
H A Driscv_vector.td414 // 6. Configuration-Setting Instructions
493 // 7.4. Vector Unit-Stride Instructions
506 // 7.5. Vector Strided Instructions
517 // 7.6. Vector Indexed Instructions
737 // 7.8 Vector Load/Store Segment Instructions
756 // 11. Vector Integer Arithmetic Instructions
803 // 11.4. Vector Integer Add-with-Carry / Subtract-with-Borrow Instructions
815 // 11.5. Vector Bitwise Logical Instructions
823 // 11.6. Vector Single-Width Shift Instructions
829 // 11.7. Vector Narrowing Integer Right Shift Instructions
[all …]
/freebsd/contrib/llvm-project/llvm/lib/MC/
H A DMCWin64EH.cpp238 uint8_t numCodes = CountOfUnwindCodes(info->Instructions); in EmitUnwindInfo()
313 WinEH::Instruction &frameInst = info->Instructions[info->LastFrameInst]; in EmitUnwindInfo()
349 uint8_t numInst = info->Instructions.size(); in EmitUnwindInfo()
351 WinEH::Instruction inst = info->Instructions.back(); in EmitUnwindInfo()
352 info->Instructions.pop_back(); in EmitUnwindInfo()
859 const auto &Instrs = InstrsIter->second.Instructions; in FindMatchingEpilog()
877 static void simplifyARM64Opcodes(std::vector<WinEH::Instruction> &Instructions, in simplifyARM64Opcodes() argument
931 for (auto It = Instructions.rbegin(); It != Instructions.rend(); It++) in simplifyARM64Opcodes()
934 for (WinEH::Instruction &Inst : Instructions) in simplifyARM64Opcodes()
971 info->EpilogMap[Sym].Instructions; in checkARM64PackedEpilog()
[all …]
H A DMCStreamer.cpp489 CurFrame->Instructions.push_back(std::move(Instruction)); in emitCFIDefCfa()
500 CurFrame->Instructions.push_back(std::move(Instruction)); in emitCFIDefCfaOffset()
510 CurFrame->Instructions.push_back(std::move(Instruction)); in emitCFIAdjustCfaOffset()
520 CurFrame->Instructions.push_back(std::move(Instruction)); in emitCFIDefCfaRegister()
532 CurFrame->Instructions.push_back(std::move(Instruction)); in emitCFILLVMDefAspaceCfa()
543 CurFrame->Instructions.push_back(std::move(Instruction)); in emitCFIOffset()
553 CurFrame->Instructions.push_back(std::move(Instruction)); in emitCFIRelOffset()
580 CurFrame->Instructions.push_back(std::move(Instruction)); in emitCFIRememberState()
591 CurFrame->Instructions.push_back(std::move(Instruction)); in emitCFIRestoreState()
601 CurFrame->Instructions.push_back(std::move(Instruction)); in emitCFISameValue()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCWinEH.h63 std::vector<Instruction> Instructions; member
65 std::vector<Instruction> Instructions; member
98 if (!Instructions.empty()) in empty()
101 if (!E.second.Instructions.empty()) in empty()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86WinCOFFTargetStreamer.cpp68 SmallVector<FPOInstruction, 5> Instructions; member
196 if (!CurFPOData->Instructions.empty()) { in emitFPOEndProc()
198 CurFPOData->Instructions.clear(); in emitFPOEndProc()
219 CurFPOData->Instructions.push_back(Inst); in emitFPOSetFrame()
230 CurFPOData->Instructions.push_back(Inst); in emitFPOPushReg()
241 CurFPOData->Instructions.push_back(Inst); in emitFPOStackAlloc()
248 if (llvm::none_of(CurFPOData->Instructions, [](const FPOInstruction &Inst) { in emitFPOStackAlign()
259 CurFPOData->Instructions.push_back(Inst); in emitFPOStackAlign()
423 for (const FPOInstruction &Inst : FPO->Instructions) { in emitFPOData()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMWinCOFFStreamer.cpp115 S.getCurrentWinEpilog()->Instructions.push_back(Inst); in emitARMWinUnwindCode()
117 CurFrame->Instructions.push_back(Inst); in emitARMWinUnwindCode()
213 auto it = CurFrame->Instructions.begin(); in emitARMWinCFIPrologEnd()
214 CurFrame->Instructions.insert(it, Inst); in emitARMWinCFIPrologEnd()
238 S.getCurrentWinEpilog()->Instructions; in emitARMWinCFIEpilogEnd()
253 S.getCurrentWinEpilog()->Instructions.push_back(Inst); in emitARMWinCFIEpilogEnd()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrUtils.td737 // Instructions introduced in AVX (no SSE equivalent forms)
751 // Instructions introduced in AVX2 (no SSE equivalent forms)
766 // Instructions introduced in AVX-512 (no SSE equivalent forms)
973 // BinOpRR - Instructions that read "reg, reg".
977 // BinOpRR_F - Instructions that read "reg, reg" and write EFLAGS only.
987 // BinOpRR_R - Instructions that read "reg, reg" and write "reg".
996 // BinOpRR_RF - Instructions that read "reg, reg", and write "reg", EFLAGS.
1007 // BinOpRRF_RF - Instructions that read "reg, reg", write "reg" and read/write
1022 // BinOpRM - Instructions that read "reg, [mem]".
1029 // BinOpRM_F - Instructions that read "reg, [mem]" and write EFLAGS only.
[all …]
/freebsd/contrib/llvm-project/llvm/lib/DWARFCFIChecker/
H A DDWARFCFIFunctionFrameStreamer.cpp33 Frames[FrameIndices.back()].Instructions.size(); in updateReceiver()
39 Directives = ArrayRef<MCCFIInstruction>(LastFrame->Instructions); in updateReceiver()
42 .drop_back(LastFrame->Instructions.size() - CurrentDirectiveIndex); in updateReceiver()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsInstructionSelector.cpp750 SmallVector<struct Instr, 2> Instructions; in select() local
760 Instructions.emplace_back(Mips::XOR, Temp, LHS, RHS); in select()
761 Instructions.emplace_back(Mips::SLTiu, ICMPReg, Temp, 1); in select()
764 Instructions.emplace_back(Mips::XOR, Temp, LHS, RHS); in select()
765 Instructions.emplace_back(Mips::SLTu, ICMPReg, Mips::ZERO, Temp); in select()
768 Instructions.emplace_back(Mips::SLTu, ICMPReg, RHS, LHS); in select()
771 Instructions.emplace_back(Mips::SLTu, Temp, LHS, RHS); in select()
772 Instructions.emplace_back(Mips::XORi, ICMPReg, Temp, 1); in select()
775 Instructions.emplace_back(Mips::SLTu, ICMPReg, LHS, RHS); in select()
778 Instructions.emplace_back(Mips::SLTu, Temp, RHS, LHS); in select()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIOptimizeVGPRLiveRange.cpp121 SmallVectorImpl<MachineInstr *> &Instructions) const;
142 SmallVectorImpl<MachineInstr *> &Instructions) const;
341 SmallVectorImpl<MachineInstr *> &Instructions) const { in collectWaterfallCandidateRegisters()
350 Instructions.push_back(&MI); in collectWaterfallCandidateRegisters()
364 for (auto *I : Instructions) { in collectWaterfallCandidateRegisters()
560 SmallVectorImpl<MachineInstr *> &Instructions) const { in optimizeWaterfallLiveRange()
592 for (auto *MI : reverse(Instructions)) { in optimizeWaterfallLiveRange()
718 SmallVector<MachineInstr *, 16> Instructions; in run() local
722 Blocks, Instructions); in run()
726 optimizeWaterfallLiveRange(Reg, LoopHeader, Blocks, Instructions); in run()
/freebsd/contrib/llvm-project/llvm/utils/TableGen/
H A DAsmWriterEmitter.cpp61 std::vector<AsmWriterInst> Instructions; member in __anon992240d30111::AsmWriterEmitter
177 for (size_t i = 0, e = Instructions.size(); i != e; ++i) { in FindUniqueOperandCommands()
178 const AsmWriterInst &Inst = Instructions[i]; in FindUniqueOperandCommands()
214 const AsmWriterInst &FirstInst = Instructions[Idxs.front()]; in FindUniqueOperandCommands()
223 const AsmWriterInst &OtherInst = Instructions[Idx]; in FindUniqueOperandCommands()
350 for (AsmWriterInst &AWI : Instructions) { in EmitGetMnemonic()
362 for (AsmWriterInst &AWI : Instructions) { in EmitGetMnemonic()
415 OpcodeInfo[Instructions[Idx].CGIIndex] |= in EmitGetMnemonic()
418 AsmWriterInst &Inst = Instructions[Idx]; in EmitGetMnemonic()
559 llvm::erase_if(Instructions, in EmitPrintInstruction()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZInstrSystem.td17 // Program-Status Word Instructions.
61 // Control Register Instructions.
97 // Prefix-Register Instructions.
109 // Breaking-Event-Address-Register Instructions.
123 // Storage-Key and Real Memory Instructions.
165 // Dynamic-Address-Translation Instructions.
224 // Memory-move Instructions.
252 // Address-Space Instructions.
294 // Linkage-Stack Instructions.
316 // Time-Related Instructions.
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/AsmParser/
H A DSparcAsmParser.cpp132 SmallVectorImpl<MCInst> &Instructions);
135 SmallVectorImpl<MCInst> &Instructions);
138 SmallVectorImpl<MCInst> &Instructions);
669 SmallVectorImpl<MCInst> &Instructions) { in expandSET() argument
711 Instructions.push_back(TmpInst); in expandSET()
737 Instructions.push_back(TmpInst); in expandSET()
743 SmallVectorImpl<MCInst> &Instructions) { in expandSETSW() argument
768 Instructions.push_back( in expandSETSW()
782 Instructions.push_back(MCInstBuilder(SP::ORri) in expandSETSW()
795 Instructions.push_back(MCInstBuilder(SP::SRArr) in expandSETSW()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64WinCOFFStreamer.cpp77 S.getCurrentWinEpilog()->Instructions.push_back(Inst); in emitARM64WinUnwindCode()
79 CurFrame->Instructions.push_back(Inst); in emitARM64WinUnwindCode()
181 auto it = CurFrame->Instructions.begin(); in emitARM64WinCFIPrologEnd()
182 CurFrame->Instructions.insert(it, Inst); in emitARM64WinCFIPrologEnd()
198 S.getCurrentWinEpilog()->Instructions.push_back(Inst); in emitARM64WinCFIEpilogEnd()
/freebsd/contrib/llvm-project/llvm/tools/llvm-mca/Views/
H A DSummaryView.cpp87 DV.Instructions = Source.size(); in collectData()
88 DV.Iterations = (LastInstructionIdx / DV.Instructions) + 1; in collectData()
89 DV.TotalInstructions = DV.Instructions * DV.Iterations; in collectData()
/freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DStackLifetime.h96 /// Interesting instructions. Instructions of the same block are adjustent
98 SmallVector<const IntrinsicInst *, 64> Instructions; variable
101 /// Instructions inside each BB have monotonic and consecutive ids.
146 return make_filter_range(Instructions, NotNull); in getMarkers()
163 return LiveRange(Instructions.size(), true); in getFullLiveRange()
/freebsd/contrib/llvm-project/llvm/lib/FuzzMutate/
H A DRandomIRBuilder.cpp195 SmallVector<Instruction *, 16> Instructions( in findOrCreateSource() local
198 makeSampler(Rand, make_filter_range(Instructions, MatchesPred)); in findOrCreateSource()
349 [this, V](ArrayRef<Instruction *> Instructions) -> Instruction * { in connectToSink() argument
351 for (auto &I : Instructions) { in connectToSink()
390 std::vector<Instruction *> Instructions; in connectToSink() local
392 Instructions.push_back(&I); in connectToSink()
393 Sink = findSinkAndConnect(Instructions); in connectToSink()

12345678910>>...12