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/freebsd/contrib/llvm-project/llvm/lib/FuzzMutate/
H A DOperations.cpp279 Type *Indexed = ExtractValueInst::getIndexedType(Cur[0]->getType(), in validInsertValueIndex() local
281 return Indexed == Cur[1]->getType(); in validInsertValueIndex()
290 while (Type *Indexed = ExtractValueInst::getIndexedType(BaseTy, I)) { in validInsertValueIndex() local
291 if (Indexed == Cur[1]->getType()) in validInsertValueIndex()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DREADME_P9.txt19 - Vector Extract Unsigned Byte Left/Right-Indexed:
22 // Left-Indexed
27 // Right-Indexed
503 - Load/Store Vector Indexed: lxvx stxvx
527 - Load as Integer Byte/Halfword & Zero Indexed: lxsibzx lxsihzx
535 - Store as Integer Byte/Halfword Indexed: stxsibx stxsihx
543 - Load Vector Halfword*8/Byte*16 Indexed: lxvh8x lxvb16x
553 - Store Vector Halfword*8/Byte*16 Indexed: stxvh8x stxvb16x
571 - Load Vector Word & Splat Indexed: lxvwsx
H A DPPCScheduleP8.td
H A DPPCInstrP10.td2395 // Indexed vector insert element
2429 // Indexed vector insert element
2442 // Indexed vector insert element
H A DPPCInstrVSX.td1680 // Load as Integer Byte/Halfword & Zero Indexed
1686 // Load Vector Halfword*8/Byte*16 Indexed
1690 // Load Vector Indexed
1701 // Load Vector Word & Splat Indexed
1718 // Store as Integer Byte/Halfword Indexed
1728 // Store Vector Halfword*8/Byte*16 Indexed
1732 // Store Vector Indexed
/freebsd/contrib/file/magic/Magdir/
H A Dgimp38 >22 belong 2 Indexed Color
H A Dmap298 # POIs,Indexed POIs,Polylines or Polygons or first map level
H A Dimages2052 # The color mode; 0~Bitmap 1~Grayscale 2~Indexed 3~RGB 4~CMYK 7~Multichannel 9~Duotone 9~Lab
3992 >7 ubyte 0x00 3D Coordinates with Indexed Color
3993 >7 ubyte 0x01 2D Coordinates with Indexed Color
4574 >>>12 uleshort 8 \b, Indexed
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.cpp6636 enum class FMAInstKind { Default, Indexed, Accumulator }; enumerator
6699 else if (kind == FMAInstKind::Indexed) in genFusedMultiply()
6852 FMAInstKind::Indexed); in genFusedMultiplyIdx()
6868 FMAInstKind::Indexed, &NewVR); in genFusedMultiplyIdxNeg()
7474 FMAInstKind::Indexed); in genAlternativeCodeSequence()
7480 FMAInstKind::Indexed); in genAlternativeCodeSequence()
7487 FMAInstKind::Indexed); in genAlternativeCodeSequence()
7493 FMAInstKind::Indexed); in genAlternativeCodeSequence()
7500 FMAInstKind::Indexed); in genAlternativeCodeSequence()
7512 FMAInstKind::Indexed); in genAlternativeCodeSequence()
[all …]
H A DSVEInstrFormats.td2397 // SVE Floating Point Multiply-Add - Indexed Group
2467 // SVE Floating Point Multiply - Indexed Group
2575 // SVE Floating Point Complex Multiply-Add - Indexed Group
2756 // SVE2 Floating Point Widening Multiply-Add - Indexed Group
3363 // SVE2 Integer Multiply-Add - Indexed Group
3414 // SVE2 Integer Multiply-Add Long - Indexed Group
3474 // SVE Integer Dot Product Group - Indexed Group
3574 // SVE2 Complex Integer Dot Product - Indexed Group
3623 // SVE2 Complex Multiply-Add - Indexed Group
3691 // SVE2 Integer Multiply - Indexed Group
[all …]
H A DAArch64SVEInstrInfo.td4230 // FP8 Widening Multiply-Add Long - Indexed Group
4236 // FP8 Widening Multiply-Add Long Long - Indexed Group
4249 // FP8 Widening Dot-Product - Indexed Group
4258 // FP8 Widening Dot-Product - Indexed Group
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVFeatures.td1094 "'XTHeadFMemIdx' (T-Head FP Indexed Memory Operations)">;
1097 "'XTHeadFMemIdx' (T-Head FP Indexed Memory Operations)">;
1108 "'XTHeadMemIdx' (T-Head Indexed Memory Operations)">;
1111 "'XTHeadMemIdx' (T-Head Indexed Memory Operations)">;
H A DRISCVInstrInfoXTHead.td353 // T-Head Load/Store Indexed instructions.
410 // T-Head Load/Store Indexed instructions.
427 // T-Head Load/Store Indexed instructions for floating point registers.
H A DRISCVSchedSiFive7.td475 // scheduled accordingly. Indexed loads and stores operate at one element per
477 // so they cannot be scheduled. Indexed and strided loads and stores have LMUL
581 // Indexed segment loads and stores operate at the same rate as strided ones,
H A DRISCVInstrInfoV.td210 // Vector Indexed Loads and Stores
275 // Indexed Segment Loads and Stores
1730 // Vector Indexed Instructions
1775 // Vector Indexed Segment Instructions
H A DRISCVScheduleV.td304 // 7.6. Vector Indexed Instructions
557 // 7.6. Vector Indexed Instructions
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAG.cpp8920 bool Indexed = AM != ISD::UNINDEXED; in getLoad() local
8921 assert((Indexed || Offset.isUndef()) && "Unindexed load with an offset!"); in getLoad()
8923 SDVTList VTs = Indexed ? in getLoad()
9175 bool Indexed = AM != ISD::UNINDEXED; in getLoadVP() local
9176 assert((Indexed || Offset.isUndef()) && "Unindexed load with an offset!"); in getLoadVP()
9178 SDVTList VTs = Indexed ? getVTList(VT, Ptr.getValueType(), MVT::Other) in getLoadVP()
9269 bool Indexed = AM != ISD::UNINDEXED; in getStoreVP() local
9270 assert((Indexed || Offset.isUndef()) && "Unindexed vp_store with an offset!"); in getStoreVP()
9271 SDVTList VTs = Indexed ? getVTList(Ptr.getValueType(), MVT::Other) in getStoreVP()
9403 bool Indexed = AM != ISD::UNINDEXED; in getStridedLoadVP() local
[all …]
/freebsd/crypto/openssl/doc/internal/man7/
H A Dbuild.info.pod432 =head2 Indexed statements
/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCInstrFormats.td712 // Indexed Jump or Execute.
H A DARCInstrInfo.td603 // Indexed Jump or Execute.
/freebsd/contrib/llvm-project/llvm/include/llvm/ProfileData/
H A DInstrProfData.inc712 /* Indexed profile format version (start from 1). */
/freebsd/contrib/llvm-project/compiler-rt/include/profile/
H A DInstrProfData.inc712 /* Indexed profile format version (start from 1). */
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsInstrFPU.td623 // Indexed loads and stores.
H A DMipsDSPInstrInfo.td1458 // Indexed load patterns.
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430InstrInfo.td676 // Indexed, indirect register and indirect autoincrement modes

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