| /freebsd/sys/arm/arm/ |
| H A D | locore.S | 142 ISB
146 ISB
304 ISB
314 ISB
318 ISB
348 ISB
357 ISB
369 ISB
374 ISB
384 ISB
[all …]
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| H A D | cpu_asm-v6.S | 236 ISB
247 ISB
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| H A D | swtch-v6.S | 128 ISB
132 ISB
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| /freebsd/sys/arm/include/ |
| H A D | asm.h | 177 #define ISB isb macro
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| /freebsd/contrib/llvm-project/llvm/lib/ProfileData/ |
| H A D | InstrProfWriter.cpp | 840 InstrProfSummaryBuilder ISB(ProfileSummaryBuilder::DefaultCutoffs); in writeImpl() local
841 InfoObj->SummaryBuilder = &ISB; in writeImpl()
970 std::unique_ptr<ProfileSummary> PS = ISB.getSummary(); in writeImpl()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
| H A D | AArch64InstPrinter.cpp | 1832 if (Opcode == AArch64::ISB) {
1833 auto ISB = AArch64ISB::lookupISBByEncoding(Val); in printBarriernXSOption()
1834 Name = ISB ? ISB->Name : ""; in printBarriernXSOption()
1818 auto ISB = AArch64ISB::lookupISBByEncoding(Val); printBarrierOption() local
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SpeculationHardening.cpp | 38 // by inserting a DSB SYS/ISB barrier pair which will prevent control
220 // A full control flow speculation barrier consists of (DSB SYS + ISB) in insertFullSpeculationBarrier()
222 BuildMI(MBB, MBBI, DL, TII->get(AArch64::ISB)).addImm(0xf); in insertFullSpeculationBarrier()
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| H A D | AArch64SchedCyclone.td | 295 // ISB
296 def : InstRW<[WriteI], (instrs ISB)>;
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| H A D | AArch64SystemOperands.td | 203 // ISB (instruction-fetch barrier) instruction options.
206 class ISB<string name, bits<4> encoding> : SearchableTable{
215 def : ISB<"sy", 0xf>;
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| H A D | AArch64SchedFalkorDetails.td | 1245 def : InstRW<[FalkorWr_1none_0cyc], (instrs BRK, DCPS1, DCPS2, DCPS3, HINT, HLT, HVC, ISB, SMC, SVC)>;
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| H A D | AArch64AsmPrinter.cpp | 2552 TmpInstISB.setOpcode(AArch64::ISB); in emitInstruction()
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| H A D | AArch64SchedKryoDetails.td | 477 (instrs BRK, DCPS1, DCPS2, DCPS3, HLT, HVC, ISB, HINT, SMC, SVC)>;
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| H A D | AArch64InstrInfo.cpp | 1157 case AArch64::ISB: in isSchedulingBoundary()
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| H A D | AArch64InstrInfo.td | 1243 def ISB : CRmSystemI<barrier_op, 0b110, "isb",
2005 def : InstAlias<"isb", (ISB 0xf)>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/ |
| H A D | AArch64BaseInfo.h | 420 struct ISB : SysAlias { struct
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMAsmPrinter.cpp | 2336 TmpInstISB.setOpcode(ARM::ISB); in emitInstruction()
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| H A D | ARMScheduleA57.td | 119 "(t2|t)?HINT$", "(t)?HLT$", "(t2)?HVC$", "(t2)?ISB$", "ITasm$",
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| H A D | ARMInstrInfo.td | 5152 // ISB has only full system option
5153 def ISB : AInoP<(outs), (ins instsyncb_opt:$opt), MiscFrm, NoItinerary,
6246 def : InstAlias<"isb", (ISB 0xf), 0>, Requires<[IsARM, HasDB]>;
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