Home
last modified time | relevance | path

Searched refs:Hi (Results 1 – 25 of 161) sorted by relevance

1234567

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeTypes.h227 SDValue JoinIntegers(SDValue Lo, SDValue Hi);
234 void SplitInteger(SDValue Op, SDValue &Lo, SDValue &Hi);
236 SDValue &Lo, SDValue &Hi);
437 /// equal to the bits of Lo; the high bits exactly equal Hi.
440 /// Op, and Hi being equal to the upper 32 bits.
441 void GetExpandedInteger(SDValue Op, SDValue &Lo, SDValue &Hi);
442 void SetExpandedInteger(SDValue Op, SDValue Lo, SDValue Hi);
446 void ExpandIntRes_ANY_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi);
447 void ExpandIntRes_AssertSext (SDNode *N, SDValue &Lo, SDValue &Hi);
448 void ExpandIntRes_AssertZext (SDNode *N, SDValue &Lo, SDValue &Hi);
1136 GetSplitOp(SDValue Op,SDValue & Lo,SDValue & Hi) GetSplitOp() argument
1168 GetExpandedOp(SDValue Op,SDValue & Lo,SDValue & Hi) GetExpandedOp() argument
[all...]
H A DLegalizeTypesGeneric.cpp13 // computation in two identical registers of a smaller type. The Lo/Hi part
31 // These routines assume that the Lo/Hi part is stored first in memory on
32 // little/big-endian machines, followed by the Hi/Lo part. This means that
35 SDValue &Lo, SDValue &Hi) { in ExpandRes_MERGE_VALUES() argument
37 GetExpandedOp(Op, Lo, Hi); in ExpandRes_MERGE_VALUES()
40 void DAGTypeLegalizer::ExpandRes_BITCAST(SDNode *N, SDValue &Lo, SDValue &Hi) { in ExpandRes_BITCAST() argument
57 SplitInteger(GetSoftenedFloat(InOp), Lo, Hi); in ExpandRes_BITCAST()
59 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); in ExpandRes_BITCAST()
65 GetExpandedOp(InOp, Lo, Hi); in ExpandRes_BITCAST()
191 ExpandRes_BUILD_PAIR(SDNode * N,SDValue & Lo,SDValue & Hi) ExpandRes_BUILD_PAIR() argument
198 ExpandRes_EXTRACT_ELEMENT(SDNode * N,SDValue & Lo,SDValue & Hi) ExpandRes_EXTRACT_ELEMENT() argument
209 ExpandRes_EXTRACT_VECTOR_ELT(SDNode * N,SDValue & Lo,SDValue & Hi) ExpandRes_EXTRACT_VECTOR_ELT() argument
248 ExpandRes_NormalLoad(SDNode * N,SDValue & Lo,SDValue & Hi) ExpandRes_NormalLoad() argument
287 ExpandRes_VAARG(SDNode * N,SDValue & Lo,SDValue & Hi) ExpandRes_VAARG() argument
385 SDValue Lo, Hi; ExpandOp_BUILD_VECTOR() local
401 SDValue Lo, Hi; ExpandOp_EXTRACT_ELEMENT() local
425 SDValue Lo, Hi; ExpandOp_INSERT_VECTOR_ELT() local
472 SDValue Lo, Hi; ExpandOp_NormalStore() local
501 SplitRes_MERGE_VALUES(SDNode * N,unsigned ResNo,SDValue & Lo,SDValue & Hi) SplitRes_MERGE_VALUES() argument
506 SplitRes_Select(SDNode * N,SDValue & Lo,SDValue & Hi) SplitRes_Select() argument
555 SplitRes_SELECT_CC(SDNode * N,SDValue & Lo,SDValue & Hi) SplitRes_SELECT_CC() argument
567 SplitRes_UNDEF(SDNode * N,SDValue & Lo,SDValue & Hi) SplitRes_UNDEF() argument
575 SplitVecRes_AssertZext(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_AssertZext() argument
584 SplitRes_FREEZE(SDNode * N,SDValue & Lo,SDValue & Hi) SplitRes_FREEZE() argument
594 SplitRes_ARITH_FENCE(SDNode * N,SDValue & Lo,SDValue & Hi) SplitRes_ARITH_FENCE() argument
[all...]
H A DLegalizeIntegerTypes.cpp505 SDValue Lo, Hi; in PromoteIntRes_BITCAST() local
506 GetSplitVector(N->getOperand(0), Lo, Hi); in PromoteIntRes_BITCAST()
508 Hi = BitConvertToInteger(Hi); in PromoteIntRes_BITCAST()
511 std::swap(Lo, Hi); in PromoteIntRes_BITCAST()
516 JoinIntegers(Lo, Hi)); in PromoteIntRes_BITCAST()
1530 SDValue Hi = GetPromotedInteger(N->getOperand(0)); in PromoteIntRes_FunnelShift() local
1557 Hi = DAG.getNode(ISD::SHL, DL, VT, Hi, HiShift); in PromoteIntRes_FunnelShift()
1559 SDValue Res = DAG.getNode(ISD::OR, DL, VT, Hi, Lo); in PromoteIntRes_FunnelShift()
1575 return DAG.getNode(Opcode, DL, VT, Hi, Lo, Amt); in PromoteIntRes_FunnelShift()
1580 SDValue Hi = GetPromotedInteger(N->getOperand(0)); in PromoteIntRes_VPFunnelShift() local
[all …]
H A DLegalizeTypes.cpp773 SDValue &Hi) { in GetExpandedInteger() argument
777 Hi = getSDValue(Entry.second); in GetExpandedInteger()
781 SDValue Hi) { in SetExpandedInteger() argument
784 Hi.getValueType() == Lo.getValueType() && in SetExpandedInteger()
788 AnalyzeNewValue(Hi); in SetExpandedInteger()
793 DAG.transferDbgValues(Op, Hi, 0, Hi.getValueSizeInBits(), false); in SetExpandedInteger()
794 DAG.transferDbgValues(Op, Lo, Hi.getValueSizeInBits(), in SetExpandedInteger()
798 DAG.transferDbgValues(Op, Hi, Lo.getValueSizeInBits(), in SetExpandedInteger()
799 Hi.getValueSizeInBits()); in SetExpandedInteger()
806 Entry.second = getTableId(Hi); in SetExpandedInteger()
[all …]
H A DLegalizeFloatTypes.cpp1374 SDValue Lo, Hi; in ExpandFloatResult() local
1375 Lo = Hi = SDValue(); in ExpandFloatResult()
1390 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break; in ExpandFloatResult()
1391 case ISD::SELECT: SplitRes_Select(N, Lo, Hi); break; in ExpandFloatResult()
1392 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break; in ExpandFloatResult()
1394 case ISD::MERGE_VALUES: ExpandRes_MERGE_VALUES(N, ResNo, Lo, Hi); break; in ExpandFloatResult()
1395 case ISD::BITCAST: ExpandRes_BITCAST(N, Lo, Hi); break; in ExpandFloatResult()
1396 case ISD::BUILD_PAIR: ExpandRes_BUILD_PAIR(N, Lo, Hi); break; in ExpandFloatResult()
1397 case ISD::EXTRACT_ELEMENT: ExpandRes_EXTRACT_ELEMENT(N, Lo, Hi); break; in ExpandFloatResult()
1398 case ISD::EXTRACT_VECTOR_ELT: ExpandRes_EXTRACT_VECTOR_ELT(N, Lo, Hi); break; in ExpandFloatResult()
[all …]
H A DLegalizeVectorTypes.cpp1058 SDValue Lo, Hi; in SplitVectorResult()
1074 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, ResNo, Lo, Hi); break; in SplitVectorResult()
1075 case ISD::AssertZext: SplitVecRes_AssertZext(N, Lo, Hi); break; in SplitVectorResult()
1079 case ISD::VP_SELECT: SplitRes_Select(N, Lo, Hi); break; in SplitVectorResult()
1080 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break; in SplitVectorResult()
1081 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break; in SplitVectorResult()
1082 case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break; in SplitVectorResult()
1083 case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break; in SplitVectorResult()
1084 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break; in SplitVectorResult()
1085 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); brea in SplitVectorResult()
1054 SDValue Lo, Hi; SplitVectorResult() local
1371 SplitVecRes_BinOp(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_BinOp() argument
1403 SplitVecRes_TernaryOp(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_TernaryOp() argument
1436 SplitVecRes_CMP(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_CMP() argument
1457 SplitVecRes_FIX(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_FIX() argument
1473 SplitVecRes_BITCAST(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_BITCAST() argument
1540 SplitVecRes_BUILD_VECTOR(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_BUILD_VECTOR() argument
1553 SplitVecRes_CONCAT_VECTORS(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_CONCAT_VECTORS() argument
1574 SplitVecRes_EXTRACT_SUBVECTOR(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_EXTRACT_SUBVECTOR() argument
1590 SplitVecRes_INSERT_SUBVECTOR(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_INSERT_SUBVECTOR() argument
1658 SplitVecRes_FPOp_MultiType(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_FPOp_MultiType() argument
1681 SplitVecRes_IS_FPCLASS(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_IS_FPCLASS() argument
1698 SplitVecRes_InregOp(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_InregOp() argument
1714 SplitVecRes_ExtVecInRegOp(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_ExtVecInRegOp() argument
1752 SplitVecRes_StrictFPOp(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_StrictFPOp() argument
1859 SplitVecRes_OverflowOp(SDNode * N,unsigned ResNo,SDValue & Lo,SDValue & Hi) SplitVecRes_OverflowOp() argument
1902 SplitVecRes_INSERT_VECTOR_ELT(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_INSERT_VECTOR_ELT() argument
1978 SplitVecRes_STEP_VECTOR(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_STEP_VECTOR() argument
2001 SplitVecRes_ScalarOp(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_ScalarOp() argument
2015 SplitVecRes_VP_SPLAT(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_VP_SPLAT() argument
2025 SplitVecRes_LOAD(LoadSDNode * LD,SDValue & Lo,SDValue & Hi) SplitVecRes_LOAD() argument
2071 SplitVecRes_VP_LOAD(VPLoadSDNode * LD,SDValue & Lo,SDValue & Hi) SplitVecRes_VP_LOAD() argument
2152 SplitVecRes_VP_STRIDED_LOAD(VPStridedLoadSDNode * SLD,SDValue & Lo,SDValue & Hi) SplitVecRes_VP_STRIDED_LOAD() argument
2233 SplitVecRes_MLOAD(MaskedLoadSDNode * MLD,SDValue & Lo,SDValue & Hi) SplitVecRes_MLOAD() argument
2317 SplitVecRes_Gather(MemSDNode * N,SDValue & Lo,SDValue & Hi,bool SplitSETCC) SplitVecRes_Gather() argument
2408 SplitVecRes_VECTOR_COMPRESS(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_VECTOR_COMPRESS() argument
2418 SplitVecRes_SETCC(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_SETCC() argument
2458 SplitVecRes_UnaryOp(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_UnaryOp() argument
2500 SplitVecRes_ADDRSPACECAST(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_ADDRSPACECAST() argument
2520 SplitVecRes_FFREXP(SDNode * N,unsigned ResNo,SDValue & Lo,SDValue & Hi) SplitVecRes_FFREXP() argument
2556 SplitVecRes_ExtendOp(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_ExtendOp() argument
2624 SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_VECTOR_SHUFFLE() argument
2976 SplitVecRes_VAARG(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_VAARG() argument
2997 SplitVecRes_FP_TO_XINT_SAT(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_FP_TO_XINT_SAT() argument
3014 SplitVecRes_VECTOR_REVERSE(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_VECTOR_REVERSE() argument
3024 SplitVecRes_VECTOR_SPLICE(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_VECTOR_SPLICE() argument
3032 SplitVecRes_VP_REVERSE(SDNode * N,SDValue & Lo,SDValue & Hi) SplitVecRes_VP_REVERSE() argument
3296 SDValue Lo, Hi; SplitVecOp_VSELECT() local
3320 SDValue Lo, Hi; SplitVecOp_VECREDUCE() local
3339 SDValue Lo, Hi; SplitVecOp_VECREDUCE_SEQ() local
3365 SDValue Lo, Hi; SplitVecOp_VP_REDUCE() local
3389 SDValue Lo, Hi; SplitVecOp_UnaryOp() local
3432 SDValue Lo, Hi; SplitVecOp_BITCAST() local
3463 SDValue Lo, Hi; SplitVecOp_INSERT_SUBVECTOR() local
3483 SDValue Lo, Hi; SplitVecOp_EXTRACT_SUBVECTOR() local
3542 SDValue Lo, Hi; SplitVecOp_EXTRACT_VECTOR_ELT() local
3597 SDValue Lo, Hi; SplitVecOp_ExtVecInRegOp() local
3608 SDValue Lo, Hi; SplitVecOp_Gather() local
3656 SDValue Lo, Hi; SplitVecOp_VP_STORE() local
3759 SDValue Hi = DAG.getStridedStoreVP( SplitVecOp_VP_STRIDED_STORE() local
3805 SDValue Lo, Hi, Res; SplitVecOp_MSTORE() local
3945 SDValue Lo, Hi; SplitVecOp_STORE() local
4154 SDValue Lo, Hi; SplitVecOp_FP_ROUND() local
4209 SDValue Hi = DAG.getNode(N->getOpcode(), DL, LHSHiVT, LHSHi, RHSHi); SplitVecOp_FPOpDifferentTypes() local
4228 SDValue Hi = DAG.getNode(N->getOpcode(), dl, NewResVT, LHSHi, RHSHi); SplitVecOp_CMP() local
4235 SDValue Lo, Hi; SplitVecOp_FP_TO_XINT_SAT() local
4254 SDValue Lo, Hi; SplitVecOp_VP_CttzElements() local
[all...]
/freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/JITLink/
H A Daarch32.cpp54 int64_t decodeImmBT4BlT1BlxT2(uint32_t Hi, uint32_t Lo) {
55 uint32_t Imm11H = Hi & 0x07ff;
79 int64_t decodeImmBT4BlT1BlxT2_J1J2(uint32_t Hi, uint32_t Lo) { in decodeImmBT4BlT1BlxT2_J1J2()
80 uint32_t S = Hi & 0x0400;
81 uint32_t I1 = ~((Lo ^ (Hi << 3)) << 10) & 0x00800000;
82 uint32_t I2 = ~((Lo ^ (Hi << 1)) << 11) & 0x00400000;
83 uint32_t Imm10 = Hi & 0x03ff;
124 uint16_t decodeImmMovtT1MovwT3(uint32_t Hi, uint32_t Lo) { in decodeRegMovtT1MovwT3()
125 uint32_t Imm4 = Hi & 0x0f; in decodeRegMovtT1MovwT3()
126 uint32_t Imm1 = (Hi >> 1 in decodeRegMovtT1MovwT3()
47 decodeImmBT4BlT1BlxT2(uint32_t Hi,uint32_t Lo) decodeImmBT4BlT1BlxT2() argument
72 decodeImmBT4BlT1BlxT2_J1J2(uint32_t Hi,uint32_t Lo) decodeImmBT4BlT1BlxT2_J1J2() argument
99 decodeImmMovtT1MovwT3(uint32_t Hi,uint32_t Lo) decodeImmMovtT1MovwT3() argument
122 decodeRegMovtT1MovwT3(uint32_t Hi,uint32_t Lo) decodeRegMovtT1MovwT3() argument
136 support::ulittle16_t &Hi; // First halfword global() member
150 const support::ulittle16_t &Hi; // First halfword global() member
163 uint16_t Hi = R.Hi & FixupInfo<Kind>::OpcodeMask.Hi; checkOpcode() local
170 uint16_t Hi = R.Hi & FixupInfo<Kind>::RegMask.Hi; checkRegister() local
[all...]
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVMergeBaseOffset.cpp35 bool detectFoldable(MachineInstr &Hi, MachineInstr *&Lo);
37 bool detectAndFoldOffset(MachineInstr &Hi, MachineInstr &Lo);
38 void foldOffset(MachineInstr &Hi, MachineInstr &Lo, MachineInstr &Tail,
40 bool foldLargeOffset(MachineInstr &Hi, MachineInstr &Lo,
42 bool foldShiftedOffset(MachineInstr &Hi, MachineInstr &Lo,
45 bool foldIntoMemoryOps(MachineInstr &Hi, MachineInstr &Lo);
85 bool RISCVMergeBaseOffsetOpt::detectFoldable(MachineInstr &Hi, in INITIALIZE_PASS()
87 if (Hi.getOpcode() != RISCV::LUI && Hi.getOpcode() != RISCV::AUIPC && in INITIALIZE_PASS()
88 Hi.getOpcode() != RISCV::PseudoMovAddr) in INITIALIZE_PASS()
91 const MachineOperand &HiOp1 = Hi.getOperand(1); in INITIALIZE_PASS()
[all …]
/freebsd/sys/contrib/dev/acpica/components/utilities/
H A Dutmath.c164 UINT32 Hi; member
215 ACPI_MUL_64_BY_32 (0, MultiplicandOvl.Part.Hi, Multiplier, in AcpiUtShortMultiply()
216 Product.Part.Hi, Carry32); in AcpiUtShortMultiply()
221 Product.Part.Hi += Carry32; in AcpiUtShortMultiply()
262 OperandOvl.Part.Hi = OperandOvl.Part.Lo; in AcpiUtShortShiftLeft()
266 ACPI_SHIFT_LEFT_64_BY_32 (OperandOvl.Part.Hi, in AcpiUtShortShiftLeft()
307 OperandOvl.Part.Lo = OperandOvl.Part.Hi; in AcpiUtShortShiftRight()
308 OperandOvl.Part.Hi = 0; in AcpiUtShortShiftRight()
311 ACPI_SHIFT_RIGHT_64_BY_32 (OperandOvl.Part.Hi, in AcpiUtShortShiftRight()
473 ACPI_DIV_64_BY_32 (0, DividendOvl.Part.Hi, Divisor, in AcpiUtShortDivide()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.h40 uint64_t Hi = 0; variable
44 DecoderUInt128(uint64_t Lo, uint64_t Hi = 0) : Lo(Lo), Hi(Hi) {} in Lo()
45 operator bool() const { return Lo || Hi; }
52 Hi |= SubBits >> 1 >> (63 - BitPosition); in insertBits()
54 Hi |= SubBits << (BitPosition - 64); in insertBits()
63 Val = Lo >> BitPosition | Hi << 1 << (63 - BitPosition); in extractBitsAsZExtValue()
65 Val = Hi >> (BitPosition - 64); in extractBitsAsZExtValue()
69 return DecoderUInt128(Lo & RHS.Lo, Hi & RHS.Hi);
74 DecoderUInt128 operator~() const { return DecoderUInt128(~Lo, ~Hi); }
76 return Lo == RHS.Lo && Hi == RHS.Hi;
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/Disassembler/
H A DBPFDisassembler.cpp144 uint64_t Lo, Hi; in readInstruction64()
153 Hi = (Bytes[0] << 24) | (Bytes[1] << 16) | (Bytes[2] << 0) | (Bytes[3] << 8); in readInstruction64()
156 Hi = (Bytes[0] << 24) | ((Bytes[1] & 0x0F) << 20) | ((Bytes[1] & 0xF0) << 12) | in readInstruction64()
160 Insn = Make_64(Hi, Lo); in readInstruction64()
170 uint64_t Insn, Hi; in getInstruction()
199 Hi = (Bytes[12] << 0) | (Bytes[13] << 8) | (Bytes[14] << 16) | (Bytes[15] << 24); in getInstruction()
201 Hi = (Bytes[12] << 24) | (Bytes[13] << 16) | (Bytes[14] << 8) | (Bytes[15] << 0); in getInstruction()
203 Op.setImm(Make_64(Hi, Op.getImm())); in getInstruction()
145 uint64_t Lo, Hi; readInstruction64() local
171 uint64_t Insn, Hi; getInstruction() local
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVMatInt.cpp320 uint64_t Hi = Val ^ Lo; in generateInstSeq() local
321 assert(Hi != 0); in generateInstSeq()
327 if (TmpSeq.size() + llvm::popcount(Hi) < Res.size()) { in generateInstSeq()
329 TmpSeq.emplace_back(RISCV::BSETI, llvm::countr_zero(Hi)); in generateInstSeq()
330 Hi &= (Hi - 1); // Clear lowest set bit. in generateInstSeq()
331 } while (Hi != 0); in generateInstSeq()
342 uint64_t Hi = Val ^ Lo; in generateInstSeq() local
343 assert(Hi != 0); in generateInstSeq()
348 if (TmpSeq.size() + llvm::popcount(Hi) < Res.size()) { in generateInstSeq()
350 TmpSeq.emplace_back(RISCV::BCLRI, llvm::countr_zero(Hi)); in generateInstSeq()
[all …]
/freebsd/contrib/llvm-project/clang/lib/CodeGen/Targets/
H A DX86.cpp1245 void postMerge(unsigned AggregateSize, Class &Lo, Class &Hi) const;
1273 void classify(QualType T, uint64_t OffsetBase, Class &Lo, Class &Hi,
1720 Class &Hi) const { in postMerge()
1742 if (Hi == Memory) in postMerge()
1744 if (Hi == X87Up && Lo != X87 && honorsRevision0_98()) in postMerge()
1746 if (AggregateSize > 128 && (Lo != SSE || Hi != SSEUp)) in postMerge()
1748 if (Hi == SSEUp && Lo != SSE) in postMerge()
1749 Hi = SSE; in postMerge()
1793 Class &Hi, bool isNamedArg, bool IsRegCall) const { in classify() argument
1802 Lo = Hi = NoClass; in classify()
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/ExecutionEngine/JITLink/
H A Daarch32.h163 /// Immutable pair of halfwords, Hi and Lo, with overflow check
165 constexpr HalfWords() : Hi(0), Lo(0) {}
166 constexpr HalfWords(uint32_t Hi, uint32_t Lo) : Hi(Hi), Lo(Lo) {
167 assert(isUInt<16>(Hi) && "Overflow in first half-word");
170 const uint16_t Hi; // First halfword
187 bool (*checkOpcode)(uint16_t Hi, uint16_t Lo) = nullptr;
133 const uint16_t Hi; // First halfword global() member
/freebsd/contrib/llvm-project/compiler-rt/lib/orc/
H A Dendianness.h59 uint16_t Hi = value << 8; in ByteSwap_16()
61 return Hi | Lo; in ByteSwap_16()
87 uint64_t Hi = ByteSwap_32(uint32_t(value)); in ByteSwap_64()
89 return (Hi << 32) | Lo; in ByteSwap_64()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsISelLowering.h73 Hi, enumerator
420 SDValue Hi = DAG.getNode(MipsISD::GotHi, DL, Ty, in getAddrGlobalLargeGOT() local
422 Hi = DAG.getNode(ISD::ADD, DL, Ty, Hi, getGlobalReg(DAG, Ty)); in getAddrGlobalLargeGOT()
423 SDValue Wrapper = DAG.getNode(MipsISD::Wrapper, DL, Ty, Hi, in getAddrGlobalLargeGOT()
437 SDValue Hi = getTargetNode(N, Ty, DAG, MipsII::MO_ABS_HI); in getAddrNonPIC() local
440 DAG.getNode(MipsISD::Hi, DL, Ty, Hi), in getAddrNonPIC()
454 SDValue Hi = getTargetNode(N, Ty, DAG, MipsII::MO_ABS_HI); in getAddrNonPICSym64() local
467 DAG.getNode(MipsISD::Hi, DL, Ty, Hi)); in getAddrNonPICSym64()
H A DMipsSEISelDAGToDAG.cpp1179 const unsigned Hi = SplatValue.lshr(16).getLoBits(16).getZExtValue(); in trySelect() local
1183 SDValue HiVal = CurDAG->getTargetConstant(Hi, DL, MVT::i32); in trySelect()
1185 if (Hi) in trySelect()
1190 Hi ? SDValue(Res, 0) : ZeroVal, LoVal); in trySelect()
1192 assert((Hi || Lo) && "Zero case reached 32 bit case splat synthesis!"); in trySelect()
1202 const unsigned Hi = SplatValue.lshr(16).getLoBits(16).getZExtValue(); in trySelect() local
1206 SDValue HiVal = CurDAG->getTargetConstant(Hi, DL, MVT::i32); in trySelect()
1208 if (Hi) in trySelect()
1213 Hi ? SDValue(Res, 0) : ZeroVal, LoVal); in trySelect()
1217 CurDAG->getTargetConstant(((Hi >> 15) & 0x1), DL, MVT::i64), in trySelect()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVVPISelLowering.cpp29 SDValue HiA = CDAG.getUnpack(MVT::v256i1, A, PackElem::Hi, AVL); in splitMaskArithmetic()
31 SDValue HiB = CDAG.getUnpack(MVT::v256i1, B, PackElem::Hi, AVL); in splitMaskArithmetic()
207 for (PackElem Part : {PackElem::Hi, PackElem::Lo}) { in splitPackedLoadStore()
213 if (Part == PackElem::Hi) in splitPackedLoadStore()
252 SDValue HiChain = SDValue(PartOps[(int)PackElem::Hi].getNode(), ChainResIdx); in splitPackedLoadStore()
264 PartOps[(int)PackElem::Hi], UpperPartAVL); in lowerVVP_GATHER_SCATTER()
365 for (PackElem Part : {PackElem::Hi, PackElem::Lo}) { in splitVectorOp()
370 if (Part == PackElem::Hi) in splitVectorOp()
399 PartOps[(int)PackElem::Hi], UpperPartAVL); in legalizePackedAVL()
/freebsd/contrib/llvm-project/llvm/lib/MC/
H A DMCObjectStreamer.cpp94 static std::optional<uint64_t> absoluteSymbolDiff(const MCSymbol *Hi, in absoluteSymbolDiff() argument
96 assert(Hi && Lo); in absoluteSymbolDiff()
97 if (!Hi->getFragment() || Hi->getFragment() != Lo->getFragment() || in absoluteSymbolDiff()
98 Hi->isVariable() || Lo->isVariable()) in absoluteSymbolDiff()
101 return Hi->getOffset() - Lo->getOffset(); in absoluteSymbolDiff()
104 void MCObjectStreamer::emitAbsoluteSymbolDiff(const MCSymbol *Hi, in emitAbsoluteSymbolDiff() argument
108 if (std::optional<uint64_t> Diff = absoluteSymbolDiff(Hi, Lo)) in emitAbsoluteSymbolDiff()
110 MCStreamer::emitAbsoluteSymbolDiff(Hi, Lo, Size); in emitAbsoluteSymbolDiff()
113 void MCObjectStreamer::emitAbsoluteSymbolDiffAsULEB128(const MCSymbol *Hi, in emitAbsoluteSymbolDiffAsULEB128() argument
116 if (std::optional<uint64_t> Diff = absoluteSymbolDiff(Hi, Lo)) { in emitAbsoluteSymbolDiffAsULEB128()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp1148 SDValue Hi = DAG.getTargetConstantPool(C, MVT::i32, N->getAlign(), in LowerConstantPool() local
1152 Hi = DAG.getNode(LanaiISD::HI, DL, MVT::i32, Hi); in LowerConstantPool()
1154 SDValue Result = DAG.getNode(ISD::OR, DL, MVT::i32, Hi, Lo); in LowerConstantPool()
1183 SDValue Hi = DAG.getTargetGlobalAddress( in LowerGlobalAddress() local
1187 Hi = DAG.getNode(LanaiISD::HI, DL, MVT::i32, Hi); in LowerGlobalAddress()
1189 return DAG.getNode(ISD::OR, DL, MVT::i32, Hi, Lo); in LowerGlobalAddress()
1201 SDValue Hi = DAG.getBlockAddress(BA, MVT::i32, true, OpFlagHi); in LowerBlockAddress() local
1203 Hi = DAG.getNode(LanaiISD::HI, DL, MVT::i32, Hi); in LowerBlockAddress()
1205 SDValue Result = DAG.getNode(ISD::OR, DL, MVT::i32, Hi, Lo); in LowerBlockAddress()
1225 SDValue Hi = DAG.getTargetJumpTable( in LowerJumpTable() local
[all …]
/freebsd/lib/libc/nls/
H A Dca_ES.ISO8859-1.msg52 23 Hi ha massa arxius oberts al sistema
54 24 Hi ha massa arxius oberts
124 59 Hi ha massa refer�ncies: no es poden unir
130 62 Hi ha massa nivells d'enlla�os simb�lics
140 67 Hi ha massa processos
142 68 Hi ha massa usuaris
/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp539 SDValue Hi = DAG.getNode(XCoreISD::MACCS, dl, in LowerSMUL_LOHI() local
542 SDValue Lo(Hi.getNode(), 1); in LowerSMUL_LOHI()
543 SDValue Ops[] = { Lo, Hi }; in LowerSMUL_LOHI()
556 SDValue Hi = DAG.getNode(XCoreISD::LMUL, dl, in LowerUMUL_LOHI() local
559 SDValue Lo(Hi.getNode(), 1); in LowerUMUL_LOHI()
560 SDValue Ops[] = { Lo, Hi }; in LowerUMUL_LOHI()
653 SDValue Hi = DAG.getNode(XCoreISD::MACCU, dl, in TryExpandADDWithMul() local
656 SDValue Lo(Hi.getNode(), 1); in TryExpandADDWithMul()
657 return DAG.getNode(ISD::BUILD_PAIR, dl, MVT::i64, Lo, Hi); in TryExpandADDWithMul()
661 SDValue Hi = DAG.getNode(XCoreISD::MACCS, dl, in TryExpandADDWithMul() local
[all …]
/freebsd/contrib/llvm-project/llvm/lib/IR/
H A DMDBuilder.cpp97 MDNode *MDBuilder::createRange(const APInt &Lo, const APInt &Hi) { in createRange() argument
98 assert(Lo.getBitWidth() == Hi.getBitWidth() && "Mismatched bitwidths!"); in createRange()
101 return createRange(ConstantInt::get(Ty, Lo), ConstantInt::get(Ty, Hi)); in createRange()
104 MDNode *MDBuilder::createRange(Constant *Lo, Constant *Hi) { in createRange() argument
106 if (Hi == Lo) in createRange()
110 return MDNode::get(Context, {createConstant(Lo), createConstant(Hi)}); in createRange()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DSwitchLoweringUtils.cpp76 const APInt &Hi = Clusters[i].High->getValue(); in findJumpTables() local
78 TotalCases[i] = (Hi - Lo).getLimitedValue() + 1; in findJumpTables()
434 uint64_t Hi = (Clusters[i].High->getValue() - LowBound).getZExtValue(); in buildBitTests() local
435 assert(Hi >= Lo && Hi < 64 && "Invalid bit case!"); in buildBitTests()
436 CB->Mask |= (-1ULL >> (63 - (Hi - Lo))) << Lo; in buildBitTests()
437 CB->Bits += Hi - Lo + 1; in buildBitTests()
/freebsd/contrib/llvm-project/llvm/include/llvm/ADT/
H A Dbit.h111 uint16_t Hi = UV << 8; in has_single_bit()
113 return Hi | Lo;
135 uint64_t Hi = llvm::byteswap<uint32_t>(UV); in count()
137 return (Hi << 32) | Lo;
75 uint16_t Hi = UV << 8; byteswap() local
99 uint64_t Hi = llvm::byteswap<uint32_t>(UV); byteswap() local

1234567