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Searched refs:GPR32 (Results 1 – 25 of 33) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCInstrInfo.td118 def GETFI : PseudoInstARC<(outs GPR32:$dst), (ins MEMii:$addr),
120 [(set GPR32:$dst, FrameADDR_ri:$addr)]>;
123 def ST_FAR : PseudoInstARC<(outs), (ins GPR32:$dst, MEMrlimm:$addr),
125 [(store GPR32:$dst, AddrModeFar:$addr)]>;
127 def STH_FAR : PseudoInstARC<(outs), (ins GPR32:$dst, MEMrlimm:$addr),
129 [(truncstorei16 GPR32:$dst, AddrModeFar:$addr)]>;
131 def STB_FAR : PseudoInstARC<(outs), (ins GPR32:$dst, MEMrlimm:$addr),
133 [(truncstorei8 GPR32:$dst, AddrModeFar:$addr)]>;
137 def CTLZ : PseudoInstARC<(outs GPR32:$A),
138 (ins GPR32:$B),
[all …]
H A DARCInstrFormats.td43 let MIOperandInfo = (ops GPR32:$B, immS<9>:$S9);
49 let MIOperandInfo = (ops GPR32:$B, i32imm:$LImm);
655 F16_LD_ADD_SUB<(outs GPR32:$a), (ins GPR32:$b, GPR32:$c),
668 F16_LD_ADD_SUB<(outs GPR32:$r), (ins GPR32:$b, immU<6>:$u6),
700 F16_LD_ST_1<(outs GPR32:$b), (ins immU<7>:$u7),
726 InstARC<2, (outs GPR32:$a), (ins GPR32:$b, GPR32:$c),
752 InstARC<2, (outs GPR32:$c), (ins GPR32:$b, immU<3>:$u3),
811 F16_GEN_DOP_BASE<i, (outs GPR32:$b), (ins GPR32:$c),
815 F16_GEN_DOP_BASE<i, (outs), (ins GPR32:$b, GPR32:$c),
819 F16_GEN_DOP_BASE<i, (outs GPR32:$b), (ins GPR32:$c),
[all …]
H A DARCRegisterInfo.td63 def GPR32: RegisterClass<"ARC", [i32], 32,
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrAtomics.td66 def : Pat<(relaxed_load<atomic_load_azext_8> (ro_Windexed8 GPR64sp:$Rn, GPR32:$Rm,
68 (LDRBBroW GPR64sp:$Rn, GPR32:$Rm, ro_Wextend8:$offset)>;
82 def : Pat<(relaxed_load<atomic_load_azext_16> (ro_Windexed16 GPR64sp:$Rn, GPR32:$Rm,
84 (LDRHHroW GPR64sp:$Rn, GPR32:$Rm, ro_Wextend16:$extend)>;
101 (ro_Windexed32 GPR64sp:$Rn, GPR32:$Rm, ro_Wextend32:$extend)),
102 (LDRWroW GPR64sp:$Rn, GPR32:$Rm, ro_Wextend32:$extend)>;
119 (ro_Windexed64 GPR64sp:$Rn, GPR32:$Rm, ro_Wextend64:$extend)),
120 (LDRXroW GPR64sp:$Rn, GPR32:$Rm, ro_Wextend64:$extend)>;
133 (ro_Windexed32 GPR64sp:$Rn, GPR32:$Rm, ro_Wextend32:$extend))))),
134 (LDRSroW GPR64sp:$Rn, GPR32:$Rm, ro_Wextend32:$extend)>;
[all …]
H A DAArch64InstrGISel.td292 def : Pat<(atomic_cmp_swap_i8 GPR64:$addr, GPR32:$desired, GPR32:$new),
293 (CMP_SWAP_8 GPR64:$addr, GPR32:$desired, GPR32:$new)>;
295 def : Pat<(atomic_cmp_swap_i16 GPR64:$addr, GPR32:$desired, GPR32:$new),
296 (CMP_SWAP_16 GPR64:$addr, GPR32:$desired, GPR32:$new)>;
298 def : Pat<(atomic_cmp_swap_i32 GPR64:$addr, GPR32:$desired, GPR32:$new),
299 (CMP_SWAP_32 GPR64:$addr, GPR32:$desired, GPR32:$new)>;
361 GPR32)>;
371 GPR32)>;
382 GPR32)>;
392 GPR32)>;
[all …]
H A DAArch64InstrInfo.td703 def top16Zero: PatLeaf<(i32 GPR32:$src), [{
721 def topbitsallzero32: PatLeaf<(i32 GPR32:$src), [{
1472 : Pseudo<(outs GPR32:$dst), (ins GPR32:$src), []>, Sched<[]>;
1862 def LDAPRB : RCPCLoad<0b00, "ldaprb", GPR32>;
1863 def LDAPRH : RCPCLoad<0b01, "ldaprh", GPR32>;
1864 def LDAPRW : RCPCLoad<0b10, "ldapr", GPR32>;
2293 def FJCVTZS : BaseFPToIntegerUnscaled<0b01, 0b11, 0b110, FPR64, GPR32,
2295 [(set GPR32:$Rd,
2306 def SETF8 : BaseFlagManipulation<0, 0, (ins GPR32:$Rn), "setf8", "{\t$Rn}">;
2307 def SETF16 : BaseFlagManipulation<0, 1, (ins GPR32:$Rn), "setf16", "{\t$Rn}">;
[all …]
H A DAArch64InstrFormats.td291 def GPR32as64 : RegisterOperand<GPR32> {
1260 def arith_shifted_reg32 : arith_shifted_reg<i32, GPR32, 32>;
1290 def logical_shifted_reg32 : logical_shifted_reg<i32, GPR32, logical_shift32>;
1411 let MIOperandInfo = (ops GPR32, arith_extend);
1417 let MIOperandInfo = (ops GPR32, arith_extend64);
2293 def W : BaseCmpBranch<GPR32, op, asm, node> {
2364 def W : BaseTestBranch<GPR32, tbz_imm0_31_diag, op, asm, node> {
2439 def Wr : BaseOneOperandData<0b0, 0b0, 0b00000, opc, GPR32, asm, node>;
2445 : BaseOneOperandData<0b0, 0b0, 0b00000, opc, GPR32, asm, node>;
2636 def Wr : BaseAddSubCarry<isSub, GPR32, asm, OpNode> {
[all …]
H A DSVEInstrFormats.td973 def : Pat<(i32 (op GPR32:$Rn, (nxv16i1 PPRAny:$Pg))),
975 def : Pat<(i64 (sext (i32 (op GPR32:$Rn, (nxv16i1 PPRAny:$Pg))))),
978 def : Pat<(i32 (op GPR32:$Rn, (nxv8i1 PPRAny:$Pg))),
980 def : Pat<(i64 (sext (i32 (op GPR32:$Rn, (nxv8i1 PPRAny:$Pg))))),
983 def : Pat<(i32 (op GPR32:$Rn, (nxv4i1 PPRAny:$Pg))),
985 def : Pat<(i64 (sext (i32 (op GPR32:$Rn, (nxv4i1 PPRAny:$Pg))))),
988 def : Pat<(i32 (op GPR32:$Rn, (nxv2i1 PPRAny:$Pg))),
990 def : Pat<(i64 (sext (i32 (op GPR32:$Rn, (nxv2i1 PPRAny:$Pg))))),
1001 def : Pat<(i32 (op GPR32:$Rn, (nxv16i1 PPRAny:$Pg))),
1003 def : Pat<(i32 (op GPR32:$Rn, (nxv8i1 PPRAny:$Pg))),
[all …]
H A DAArch64SVEInstrInfo.td2204 def CTERMEQ_WW : sve_int_cterm<0b0, 0b0, "ctermeq", GPR32>;
2205 def CTERMNE_WW : sve_int_cterm<0b0, 0b1, "ctermne", GPR32>;
2322 def : Pat<(i32 (add GPR32:$Op1, (trunc (i64 (AArch64CttzElts nxv16i1:$Op2))))),
2324 (INSERT_SUBREG (IMPLICIT_DEF), GPR32:$Op1, sub_32)),
2330 def : Pat<(i32 (add GPR32:$Op1, (trunc (i64 (AArch64CttzElts nxv8i1:$Op2))))),
2332 (INSERT_SUBREG (IMPLICIT_DEF), GPR32:$Op1, sub_32)),
2338 def : Pat<(i32 (add GPR32:$Op1, (trunc (i64 (AArch64CttzElts nxv4i1:$Op2))))),
2340 (INSERT_SUBREG (IMPLICIT_DEF), GPR32:$Op1, sub_32)),
2346 def : Pat<(i32 (add GPR32:$Op1, (trunc (i64 (AArch64CttzElts nxv2i1:$Op2))))),
2348 (INSERT_SUBREG (IMPLICIT_DEF), GPR32:$Op1, sub_32)),
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsCondMov.td199 defm : MovzPats0<GPR32, GPR32, MOVZ_I_I, SLT, SLTu, SLTi, SLTiu>,
201 defm : MovzPats1<GPR32, GPR32, MOVZ_I_I, XOR>, INSN_MIPS4_32_NOT_32R6_64R6;
202 defm : MovzPats2<GPR32, GPR32, MOVZ_I_I, XORi>, INSN_MIPS4_32_NOT_32R6_64R6;
204 defm : MovzPats0<GPR32, GPR64, MOVZ_I_I64, SLT, SLTu, SLTi, SLTiu>,
206 defm : MovzPats0<GPR64, GPR32, MOVZ_I_I, SLT64, SLTu64, SLTi64, SLTiu64>,
210 defm : MovzPats1<GPR32, GPR64, MOVZ_I_I64, XOR>,
212 defm : MovzPats1<GPR64, GPR32, MOVZ_I64_I, XOR64>,
216 defm : MovzPats2<GPR32, GPR64, MOVZ_I_I64, XORi>,
218 defm : MovzPats2<GPR64, GPR32, MOVZ_I64_I, XORi64>,
223 defm : MovnPats<GPR32, GPR32, MOVN_I_I, XOR>, INSN_MIPS4_32_NOT_32R6_64R6;
[all …]
H A DMicroMipsInstrInfo.td125 let MIOperandInfo = (ops GPR32, simm11);
1106 def PseudoMFHI_MM : PseudoMFLOHI<GPR32, ACC64, MipsMFHI>,
1108 def PseudoMFLO_MM : PseudoMFLOHI<GPR32, ACC64, MipsMFLO>,
1110 def PseudoMTLOHI_MM : PseudoMTLOHI<ACC64, GPR32>,
1181 def : MipsPat<(add GPR32:$gp, (MipsGPRel tglobaladdr:$in)),
1182 (ADDiu_MM GPR32:$gp, tglobaladdr:$in)>, ISA_MICROMIPS;
1183 def : MipsPat<(add GPR32:$gp, (MipsGPRel tconstpool:$in)),
1184 (ADDiu_MM GPR32:$gp, tconstpool:$in)>, ISA_MICROMIPS;
1186 def : WrapperPat<tglobaladdr, ADDiu_MM, GPR32>, ISA_MICROMIPS;
1187 def : WrapperPat<tconstpool, ADDiu_MM, GPR32>, ISA_MICROMIPS;
[all …]
H A DMips64r6InstrInfo.td307 def : MipsPat<(i64 (sext (i32 (mul GPR32:$src, GPR32:$src2)))),
309 (MUL_R6 GPR32:$src, GPR32:$src2), sub_32)>, ISA_MIPS64R6;
310 def : MipsPat<(i64 (sext (i32 (sdiv GPR32:$src, GPR32:$src2)))),
312 (DIV GPR32:$src, GPR32:$src2), sub_32)>, ISA_MIPS64R6;
313 def : MipsPat<(i64 (sext (i32 (udiv GPR32:$src, GPR32:$src2)))),
315 (DIVU GPR32:$src, GPR32:$src2), sub_32)>, ISA_MIPS64R6;
316 def : MipsPat<(i64 (sext (i32 (srem GPR32:$src, GPR32:$src2)))),
318 (MOD GPR32:$src, GPR32:$src2), sub_32)>, ISA_MIPS64R6;
319 def : MipsPat<(i64 (sext (i32 (urem GPR32:$src, GPR32:$src2)))),
321 (MODU GPR32:$src, GPR32:$src2), sub_32)>, ISA_MIPS64R6;
H A DMipsInstrInfo.td1919 def ATOMIC_LOAD_ADD_I8 : Atomic2Ops<atomic_load_add_i8, GPR32>;
1920 def ATOMIC_LOAD_ADD_I16 : Atomic2Ops<atomic_load_add_i16, GPR32>;
1921 def ATOMIC_LOAD_ADD_I32 : Atomic2Ops<atomic_load_add_i32, GPR32>;
1922 def ATOMIC_LOAD_SUB_I8 : Atomic2Ops<atomic_load_sub_i8, GPR32>;
1923 def ATOMIC_LOAD_SUB_I16 : Atomic2Ops<atomic_load_sub_i16, GPR32>;
1924 def ATOMIC_LOAD_SUB_I32 : Atomic2Ops<atomic_load_sub_i32, GPR32>;
1925 def ATOMIC_LOAD_AND_I8 : Atomic2Ops<atomic_load_and_i8, GPR32>;
1926 def ATOMIC_LOAD_AND_I16 : Atomic2Ops<atomic_load_and_i16, GPR32>;
1927 def ATOMIC_LOAD_AND_I32 : Atomic2Ops<atomic_load_and_i32, GPR32>;
1928 def ATOMIC_LOAD_OR_I8 : Atomic2Ops<atomic_load_or_i8, GPR32>;
[all …]
H A DMips64InstrInfo.td415 def DSLL64_32 : FR<0x00, 0x3c, (outs GPR64:$rd), (ins GPR32:$rt),
418 def SLL64_32 : FR<0x0, 0x00, (outs GPR64:$rd), (ins GPR32:$rt),
841 def : MipsPat<(i64 (anyext GPR32:$src)),
842 (INSERT_SUBREG (i64 (IMPLICIT_DEF)), GPR32:$src, sub_32)>,
844 def : MipsPat<(i64 (zext GPR32:$src)), (DSRL (DSLL64_32 GPR32:$src), 32)>,
846 def : MipsPat<(i64 (sext_like GPR32:$src)), (SLL64_32 GPR32:$src)>, ISA_MIPS3,
850 def : MipsPat<(i64 (zext GPR32:$src)), (DEXT64_32 GPR32:$src, 0, 32)>,
852 def : MipsPat<(i64 (zext (i32 (shl GPR32:$rt, immZExt5:$imm)))),
853 (CINS64_32 GPR32:$rt, imm:$imm, (immZExt5To31 imm:$imm))>,
914 def : MipsPat<(i64 (sext_like (i32 (add GPR32:$src, immSExt16:$imm16)))),
[all …]
H A DMicroMips32r6InstrInfo.td1741 def : MipsPat<(subc GPR32:$lhs, GPR32:$rhs),
1742 (SUBU_MMR6 GPR32:$lhs, GPR32:$rhs)>, ISA_MICROMIPS32R6;
1772 def : MipsPat<(and GPR32:$src, immZExt16:$imm),
1773 (ANDI_MMR6 GPR32:$src, immZExt16:$imm)>, ISA_MICROMIPS32R6;
1778 def : MipsPat<(not GPR32:$in),
1814 def : MipsPat<(brcond (i32 (setne GPR32:$lhs, 0)), bb:$dst),
1815 (BNEZC_MMR6 GPR32:$lhs, bb:$dst)>, ISA_MICROMIPS32R6;
1816 def : MipsPat<(brcond (i32 (seteq GPR32:$lhs, 0)), bb:$dst),
1817 (BEQZC_MMR6 GPR32:$lhs, bb:$dst)>, ISA_MICROMIPS32R6;
1819 def : MipsPat<(brcond (i32 (setge GPR32:$lhs, GPR32:$rhs)), bb:$dst),
[all …]
H A DMipsRegisterBanks.td12 def GPRBRegBank : RegisterBank<"GPRB", [GPR32]>;
H A DMicroMipsInstrFPU.td450 defm : MovzPats0<GPR32, FGR32, MOVZ_I_S_MM, SLT_MM, SLTu_MM, SLTi_MM, SLTiu_MM>,
452 defm : MovzPats1<GPR32, FGR32, MOVZ_I_S_MM, XOR_MM>,
455 defm : MovnPats<GPR32, FGR32, MOVN_I_S_MM, XOR_MM>,
458 defm : MovzPats0<GPR32, AFGR64, MOVZ_I_D32_MM, SLT_MM, SLTu_MM, SLTi_MM,
461 defm : MovzPats1<GPR32, AFGR64, MOVZ_I_D32_MM, XOR_MM>,
463 defm : MovnPats<GPR32, AFGR64, MOVN_I_D32_MM, XOR_MM>,
H A DMipsMSAInstrInfo.td2267 PseudoSE<(outs RO:$dst), (ins PtrRC:$ptr, GPR32:$imm),
2268 [(set RO:$dst, (intrinsic iPTR:$ptr, GPR32:$imm))]> {
2609 PseudoSE<(outs), (ins RO:$dst, PtrRC:$ptr, GPR32:$imm),
2610 [(intrinsic RO:$dst, iPTR:$ptr, GPR32:$imm)]> {
3687 MipsPseudo<(outs GPR32:$dst),
3689 [(set GPR32:$dst, (OpNode (TyNode RCWS:$ws)))]> {
3845 GPR32), (i32 24))>;
3850 GPR32), (i32 16))>;
3855 GPR32)>;
3866 GPR32), (i32 24))>;
[all …]
H A DMipsDSPInstrInfo.td1317 def PseudoMTLOHI_DSP : PseudoMTLOHI<ACC64DSP, GPR32>;
1329 def : BitconvertPat<i32, v2i16, GPR32, DSPR>;
1330 def : BitconvertPat<i32, v4i8, GPR32, DSPR>;
1331 def : BitconvertPat<v2i16, i32, DSPR, GPR32>;
1332 def : BitconvertPat<v4i8, i32, DSPR, GPR32>;
1343 (SW (COPY_TO_REGCLASS DSPR:$val, GPR32), addr:$a)>;
1345 (SW (COPY_TO_REGCLASS DSPR:$val, GPR32), addr:$a)>;
1438 DSPPat<(i32 (OpNode GPR32:$rs, ACC64DSP:$ac)),
1439 (Instr ACC64DSP:$ac, GPR32:$rs)>;
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFInstrInfo.td234 (ins GPR32:$dst, GPR32:$src, brtarget:$BrDst),
250 (ins GPR32:$dst, i32imm:$imm, brtarget:$BrDst),
323 (outs GPR32:$dst),
324 (ins GPR32:$src2, GPR32:$src),
326 [(set GPR32:$dst, (OpNode i32:$src2, i32:$src))]>;
328 (outs GPR32:$dst),
329 (ins GPR32:$src2, i32imm:$imm),
331 [(set GPR32:$dst, (OpNode GPR32:$src2, i32immSExt32:$imm))]>;
368 def NEG_32: NEG_RR<BPF_ALU, BPF_NEG, (outs GPR32:$dst), (ins GPR32:$src),
370 [(set GPR32:$dst, (ineg i32:$src))]>;
[all …]
H A DBPFRegisterInfo.td39 def GPR32 : RegisterClass<"BPF", [i32], 64, (add
/freebsd/contrib/llvm-project/lldb/source/Plugins/ABI/X86/
H A DABIX86.cpp51 GPR32, enumerator
147 {{GPR32, "e" l "x", std::nullopt}, \
160 {{GPR32, "e" r16, std::nullopt}, \
170 BaseRegToRegsMap::value_type("r" #n, {{GPR32, "r" #n "d", std::nullopt}, \
258 addPartialRegisters(regs, subreg_by_kind[GPR32], gpr_base_size, eEncodingUint, in AugmentRegisterInfo()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.td66 class GPR32<bits<16> num, string n> : SystemZReg<n> {
71 class GPR64<bits<16> num, string n, GPR32 low, GPR32 high>
88 def R#I#L : GPR32<I, "r"#I>;
89 def R#I#H : GPR32<I, "r"#I>;
90 def R#I#D : GPR64<I, "r"#I, !cast<GPR32>("R"#I#"L"), !cast<GPR32>("R"#I#"H")>,
/freebsd/contrib/llvm-project/lldb/source/Plugins/Process/Utility/
H A DRegisterContextFreeBSD_powerpc.cpp95 } GPR32; typedef
202 return sizeof(GPR32); in GetGPRSize()
H A DRegisterInfos_powerpc.h194 #define GPR GPR32

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