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Searched refs:GENMASK_ULL (Results 1 – 19 of 19) sorted by relevance

/freebsd/sys/dev/irdma/
H A Dirdma_defs.h332 #ifndef GENMASK_ULL
333 #define GENMASK_ULL(high, low) ((0xFFFFFFFFFFFFFFFFULL >> (64ULL - ((high) - (low) + 1ULL))) << (lo… macro
361 #define IRDMA_CQPSQ_QHASH_VLANID GENMASK_ULL(43, 32)
363 #define IRDMA_CQPSQ_QHASH_QPN GENMASK_ULL(49, 32)
365 #define IRDMA_CQPSQ_QHASH_QS_HANDLE GENMASK_ULL(9, 0)
367 #define IRDMA_CQPSQ_QHASH_SRC_PORT GENMASK_ULL(31, 16)
369 #define IRDMA_CQPSQ_QHASH_DEST_PORT GENMASK_ULL(15, 0)
371 #define IRDMA_CQPSQ_QHASH_ADDR0 GENMASK_ULL(63, 32)
373 #define IRDMA_CQPSQ_QHASH_ADDR1 GENMASK_ULL(31, 0)
375 #define IRDMA_CQPSQ_QHASH_ADDR2 GENMASK_ULL(63, 32)
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H A Dirdma_uda_d.h52 #define IRDMA_UDA_QPSQ_INLINEDATALEN GENMASK_ULL(55, 48)
54 #define IRDMA_UDA_QPSQ_ADDFRAGCNT GENMASK_ULL(41, 38)
56 #define IRDMA_UDA_QPSQ_IPFRAGFLAGS GENMASK_ULL(43, 42)
64 #define IRDMA_UDA_QPSQ_AHIDX GENMASK_ULL(16, 0)
66 #define IRDMA_UDA_QPSQ_PROTOCOL GENMASK_ULL(23, 16)
68 #define IRDMA_UDA_QPSQ_EXTHDRLEN GENMASK_ULL(40, 32)
72 #define IRDMA_UDA_QPSQ_MACLEN GENMASK_ULL(62, 56)
75 #define IRDMA_UDA_QPSQ_IPLEN GENMASK_ULL(54, 48)
78 #define IRDMA_UDA_QPSQ_L4T GENMASK_ULL(31, 30)
81 #define IRDMA_UDA_QPSQ_IIPT GENMASK_ULL(29, 28)
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H A Dicrdma_hw.h108 #define ICRDMA_CQPSQ_STAG_PDID GENMASK_ULL(63, 46)
110 #define ICRDMA_CQPSQ_CQ_CEQID GENMASK_ULL(31, 22)
112 #define ICRDMA_CQPSQ_CQ_CQID GENMASK_ULL(18, 0)
114 #define ICRDMA_COMMIT_FPM_CQCNT GENMASK_ULL(19, 0)
116 #define ICRDMA_CQPSQ_UPESD_HMCFNID GENMASK_ULL(5, 0)
H A Dirdma_utils.c2226 tmp &= GENMASK_ULL(63, 58); in clear_qp_ctx_addr()
2230 tmp &= GENMASK_ULL(7, 0); in clear_qp_ctx_addr()
2234 tmp &= GENMASK_ULL(7, 0); in clear_qp_ctx_addr()
/freebsd/contrib/ofed/libirdma/
H A Dirdma_defs.h110 #ifndef GENMASK_ULL
111 #define GENMASK_ULL(high, low) ((0xFFFFFFFFFFFFFFFFULL >> (64ULL - ((high) - (low) + 1ULL))) << (lo… macro
122 #define IRDMA_CQPHC_QPCTX GENMASK_ULL(63, 0)
124 #define IRDMA_QP_DBSA_HW_SQ_TAIL GENMASK_ULL(14, 0)
126 #define IRDMA_CQ_DBSA_CQEIDX GENMASK_ULL(19, 0)
128 #define IRDMA_CQ_DBSA_SW_CQ_SELECT GENMASK_ULL(13, 0)
134 #define IRDMA_CQ_DBSA_ARM_SEQ_NUM GENMASK_ULL(17, 16)
141 #define IRDMA_CQ_MINERR GENMASK_ULL(15, 0)
143 #define IRDMA_CQ_MAJERR GENMASK_ULL(31, 16)
145 #define IRDMA_CQ_WQEIDX GENMASK_ULL(46, 32)
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/freebsd/sys/contrib/dev/rtw89/
H A Dphy.h31 #define RA_MASK_CCK_RATES GENMASK_ULL(3, 0)
32 #define RA_MASK_OFDM_RATES GENMASK_ULL(11, 4)
35 #define RA_MASK_HT_1SS_RATES GENMASK_ULL(19, 12)
36 #define RA_MASK_HT_2SS_RATES GENMASK_ULL(31, 24)
37 #define RA_MASK_HT_3SS_RATES GENMASK_ULL(43, 36)
38 #define RA_MASK_HT_4SS_RATES GENMASK_ULL(55, 48)
39 #define RA_MASK_HT_RATES GENMASK_ULL(55, 12)
40 #define RA_MASK_VHT_1SS_RATES GENMASK_ULL(21, 12)
41 #define RA_MASK_VHT_2SS_RATES GENMASK_ULL(33, 24)
42 #define RA_MASK_VHT_3SS_RATES GENMASK_ULL(4
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H A Dphy.c62 ra_mask |= GENMASK_ULL(highest_mcs, 0) << nss; in get_mcs_ra_mask()
65 ra_mask |= GENMASK_ULL(highest_mcs - gap, 0) << nss; in get_mcs_ra_mask()
68 ra_mask |= GENMASK_ULL(highest_mcs - gap * 2, 0) << nss; in get_mcs_ra_mask()
112 nss_mcs_val = GENMASK_ULL(start_mcs + i * 2, 0); in rtw89_phy_ra_mask_rssi()
/freebsd/sys/dev/hyperv/vmbus/
H A Dvmbus_var.h161 #define GENMASK_ULL(h, l) (((~0ULL) >> (64 - (h) - 1)) & ((~0ULL) << (l))) macro
166 #define HV_HYPERCALL_RESULT_MASK GENMASK_ULL(15, 0)
168 #define HV_HYPERCALL_REP_COMP_MASK GENMASK_ULL(43, 32)
173 #define HV_HYPERCALL_REP_START_MASK GENMASK_ULL(59, 48)
H A Dhyperv_mmu.c122 vpset->valid_bank_mask = GENMASK_ULL(nr_bank - 1, 0); in hv_cpumask_to_vpset()
/freebsd/sys/contrib/dev/rtw88/
H A Dcoex.h55 le64_get_bits(*((__le64 *)(payload)), GENMASK_ULL(39, 32))
57 le64_get_bits(*((__le64 *)(payload)), GENMASK_ULL(39, 24))
59 le64_get_bits(*((__le64 *)(payload)), GENMASK_ULL(55, 24))
61 le64_get_bits(*((__le64 *)(payload)), GENMASK_ULL(39, 24))
H A Dmain.c1178 u64 cfg_mask = GENMASK_ULL(63, 0); in rtw_rate_mask_cfg()
/freebsd/sys/dev/qat/include/common/
H A Dadf_gen4_hw_data.h42 ((((addr) >> 6) & (GENMASK_ULL(63, 0) << (size))) << 6)
H A Dadf_gen2_hw_data.h31 (((addr) >> 6) & (GENMASK_ULL(63, 0) << (size)))
/freebsd/sys/contrib/ena-com/
H A Dena_eth_com.c574 GENMASK_ULL(io_sq->dma_addr_bits - 1, 32)) >> 32); in ena_com_prepare_tx()
696 ((ena_buf->paddr & GENMASK_ULL(io_sq->dma_addr_bits - 1, 32)) >> 32); in ena_com_add_single_rx_desc()
H A Dena_plat.h188 #define GENMASK_ULL(h, l) (((~0ULL) << (l)) & (~0ULL >> (64 - 1 - (h)))) macro
H A Dena_com.c118 if (unlikely((addr & GENMASK_ULL(ena_dev->dma_addr_bits - 1, 0)) != addr)) { in ena_com_mem_addr_set()
/freebsd/sys/contrib/dev/athk/ath10k/
H A Dce.h31 #define CE_DESC_ADDR_MASK GENMASK_ULL(34, 0)
/freebsd/sys/compat/linuxkpi/common/include/linux/
H A Dbitops.h54 #define GENMASK_ULL(h, l) (((~0ULL) >> (BITS_PER_LONG_LONG - (h) - 1)) & ((~0ULL) << (l))) macro
/freebsd/sys/contrib/dev/athk/ath11k/
H A Ddebugfs_htt_stats.h10 #define HTT_STATS_COOKIE_LSB GENMASK_ULL(31, 0)
11 #define HTT_STATS_COOKIE_MSB GENMASK_ULL(63, 32)