/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/MCTargetDesc/ |
H A D | AVRAsmBackend.cpp | 39 std::string Description, const MCFixup &Fixup, in signed_width() argument 51 Ctx->reportError(Fixup.getLoc(), Diagnostic); in signed_width() 59 std::string Description, const MCFixup &Fixup, in unsigned_width() argument 70 Ctx->reportError(Fixup.getLoc(), Diagnostic); in unsigned_width() 78 static void adjustBranch(unsigned Size, const MCFixup &Fixup, uint64_t &Value, in adjustBranch() argument 82 unsigned_width(Size + 1, Value, std::string("branch target"), Fixup, Ctx); in adjustBranch() 89 static void adjustRelativeBranch(unsigned Size, const MCFixup &Fixup, in adjustRelativeBranch() argument 96 signed_width(Size + 1, Value, std::string("branch target"), Fixup, Ctx); in adjustRelativeBranch() 108 static void fixup_call(unsigned Size, const MCFixup &Fixup, uint64_t &Value, in fixup_call() argument 110 adjustBranch(Size, Fixup, Value, Ctx); in fixup_call() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64ELFObjectWriter.cpp | 41 const MCFixup &Fixup, bool IsPCRel) const override; 61 static bool isNonILP32reloc(const MCFixup &Fixup, in isNonILP32reloc() argument 64 if (Fixup.getTargetKind() != AArch64::fixup_aarch64_movw) in isNonILP32reloc() 68 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_UABS_G3)); in isNonILP32reloc() 71 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_UABS_G2)); in isNonILP32reloc() 74 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_SABS_G2)); in isNonILP32reloc() 77 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_UABS_G2_NC)); in isNonILP32reloc() 80 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_SABS_G1)); in isNonILP32reloc() 83 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(MOVW_UABS_G1_NC)); in isNonILP32reloc() 86 Ctx.reportError(Fixup.getLoc(), BAD_ILP32_MOV(TLSLD_MOVW_DTPREL_G2)); in isNonILP32reloc() [all …]
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H A D | AArch64AsmBackend.cpp | 88 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, 93 bool fixupNeedsRelaxation(const MCFixup &Fixup, 102 bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup, 154 static uint64_t adjustFixupValue(const MCFixup &Fixup, const MCValue &Target, in adjustFixupValue() argument 158 switch (Fixup.getTargetKind()) { in adjustFixupValue() 163 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue() 169 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue() 177 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue() 179 Ctx.reportError(Fixup.getLoc(), "fixup not sufficiently aligned"); in adjustFixupValue() 188 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue() [all …]
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H A D | AArch64MachObjectWriter.cpp | 35 bool getAArch64FixupKindMachOInfo(const MCFixup &Fixup, unsigned &RelocType, 44 const MCFragment *Fragment, const MCFixup &Fixup, 51 const MCFixup &Fixup, unsigned &RelocType, const MCSymbolRefExpr *Sym, in getAArch64FixupKindMachOInfo() argument 56 switch (Fixup.getTargetKind()) { in getAArch64FixupKindMachOInfo() 101 Asm.getContext().reportError(Fixup.getLoc(), in getAArch64FixupKindMachOInfo() 150 const MCFixup &Fixup, MCValue Target, uint64_t &FixedValue) { in recordRelocation() argument 151 unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind()); in recordRelocation() 159 unsigned Kind = Fixup.getKind(); in recordRelocation() 162 FixupOffset += Fixup.getOffset(); in recordRelocation() 178 Asm.getContext().reportError(Fixup.getLoc(), in recordRelocation() [all …]
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H A D | AArch64WinCOFFObjectWriter.cpp | 41 const MCFixup &Fixup, bool IsCrossSection, 50 MCContext &Ctx, const MCValue &Target, const MCFixup &Fixup, in getRelocType() argument 52 unsigned FixupKind = Fixup.getKind(); in getRelocType() 59 Ctx.reportError(Fixup.getLoc(), "Cannot represent this expression"); in getRelocType() 67 const MCExpr *Expr = Fixup.getValue(); in getRelocType() 77 Ctx.reportError(Fixup.getLoc(), "relocation variant " + in getRelocType() 87 Ctx.reportError(Fixup.getLoc(), "relocation type " + in getRelocType() 91 const MCFixupKindInfo &Info = MAB.getFixupKindInfo(Fixup.getKind()); in getRelocType() 92 Ctx.reportError(Fixup.getLoc(), Twine("relocation type ") + Info.Name + in getRelocType() 160 bool AArch64WinCOFFObjectWriter::recordRelocation(const MCFixup &Fixup) const { in recordRelocation()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/ |
H A D | X86MachObjectWriter.cpp | 30 const MCFixup &Fixup, 37 const MCFixup &Fixup, 44 const MCFixup &Fixup, 48 const MCFragment *Fragment, const MCFixup &Fixup, 56 const MCFragment *Fragment, const MCFixup &Fixup, in recordRelocation() argument 59 RecordX86_64Relocation(Writer, Asm, Fragment, Fixup, Target, FixedValue); in recordRelocation() 61 RecordX86Relocation(Writer, Asm, Fragment, Fixup, Target, FixedValue); in recordRelocation() 97 const MCFixup &Fixup, MCValue Target, uint64_t &FixedValue) { in RecordX86_64Relocation() argument 98 unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind()); in RecordX86_64Relocation() 99 unsigned IsRIPRel = isFixupKindRIPRel(Fixup.getKind()); in RecordX86_64Relocation() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/MCTargetDesc/ |
H A D | BPFAsmBackend.cpp | 31 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, 75 void BPFAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, in applyFixup() argument 80 if (Fixup.getKind() == FK_SecRel_8) { in applyFixup() 84 support::endian::write<uint32_t>(&Data[Fixup.getOffset() + 4], in applyFixup() 87 } else if (Fixup.getKind() == FK_Data_4) { in applyFixup() 88 support::endian::write<uint32_t>(&Data[Fixup.getOffset()], Value, Endian); in applyFixup() 89 } else if (Fixup.getKind() == FK_Data_8) { in applyFixup() 90 support::endian::write<uint64_t>(&Data[Fixup.getOffset()], Value, Endian); in applyFixup() 91 } else if (Fixup.getKind() == FK_PCRel_4) { in applyFixup() 94 Data[Fixup.getOffset() + 1] = 0x10; in applyFixup() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/VE/MCTargetDesc/ |
H A D | VEELFObjectWriter.cpp | 32 const MCFixup &Fixup, bool IsPCRel) const override; 40 const MCFixup &Fixup, in getRelocType() argument 42 if (const VEMCExpr *SExpr = dyn_cast<VEMCExpr>(Fixup.getValue())) { in getRelocType() 48 switch (Fixup.getTargetKind()) { in getRelocType() 50 Ctx.reportError(Fixup.getLoc(), "Unsupported pc-relative fixup kind"); in getRelocType() 54 Ctx.reportError(Fixup.getLoc(), in getRelocType() 59 Ctx.reportError(Fixup.getLoc(), in getRelocType() 67 Ctx.reportError(Fixup.getLoc(), in getRelocType() 80 switch (Fixup.getTargetKind()) { in getRelocType() 82 Ctx.reportError(Fixup in getRelocType() [all...] |
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/ |
H A D | CSKYAsmBackend.cpp | 85 static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value, in adjustFixupValue() argument 87 switch (Fixup.getTargetKind()) { in adjustFixupValue() 106 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value."); in adjustFixupValue() 108 Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned."); in adjustFixupValue() 113 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value."); in adjustFixupValue() 115 Ctx.reportError(Fixup.getLoc(), "fixup value must be 4-byte aligned."); in adjustFixupValue() 120 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value."); in adjustFixupValue() 122 Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned."); in adjustFixupValue() 127 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value."); in adjustFixupValue() 129 Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned."); in adjustFixupValue() [all …]
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H A D | CSKYELFObjectWriter.cpp | 29 const MCFixup &Fixup, bool IsPCRel) const override; 36 const MCFixup &Fixup, in getRelocType() argument 38 const MCExpr *Expr = Fixup.getValue(); in getRelocType() 40 unsigned Kind = Fixup.getTargetKind(); in getRelocType() 47 Ctx.reportError(Fixup.getLoc(), "Unsupported relocation type"); in getRelocType() 72 Ctx.reportError(Fixup.getLoc(), "Unsupported relocation type"); in getRelocType() 75 Ctx.reportError(Fixup.getLoc(), "1-byte data relocations not supported"); in getRelocType() 78 Ctx.reportError(Fixup.getLoc(), "2-byte data relocations not supported"); in getRelocType() 107 Ctx.reportError(Fixup.getLoc(), "unknown target FK_Data_4"); in getRelocType() 111 Ctx.reportError(Fixup.getLoc(), in getRelocType() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/MCTargetDesc/ |
H A D | XtensaAsmBackend.cpp | 40 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, 79 static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value, in adjustFixupValue() argument 81 unsigned Kind = Fixup.getKind(); in adjustFixupValue() 93 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue() 101 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue() 106 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue() 111 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue() 116 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue() 118 Ctx.reportError(Fixup.getLoc(), "fixup value must be 4-byte aligned"); in adjustFixupValue() 121 unsigned Offset = Fixup.getOffset(); in adjustFixupValue() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/ |
H A D | RISCVAsmBackend.cpp | 115 const MCFixup &Fixup, in shouldForceRelocation() argument 118 if (Fixup.getKind() >= FirstLiteralRelocationKind) in shouldForceRelocation() 120 switch (Fixup.getTargetKind()) { in shouldForceRelocation() 142 const MCAssembler &Asm, const MCFixup &Fixup, bool Resolved, uint64_t Value, in fixupNeedsRelaxationAdvanced() argument 148 unsigned Kind = Fixup.getTargetKind(); in fixupNeedsRelaxationAdvanced() 231 std::pair<MCFixupKind, MCFixupKind> Fixup; in relaxDwarfLineAddr() local 245 Fixup = RISCV::getRelocPairForSize(PtrSize); in relaxDwarfLineAddr() 250 Fixup = RISCV::getRelocPairForSize(2); in relaxDwarfLineAddr() 255 Fixups.push_back(MCFixup::create(Offset, MBE.getLHS(), std::get<0>(Fixup))); in relaxDwarfLineAddr() 256 Fixups.push_back(MCFixup::create(Offset, MBE.getRHS(), std::get<1>(Fixup))); in relaxDwarfLineAddr() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
H A D | ARMMachObjectWriter.cpp | 32 const MCFixup &Fixup, MCValue Target, 38 const MCFixup &Fixup, MCValue Target, 51 const MCFragment *Fragment, const MCFixup &Fixup, 135 const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target, in recordARMScatteredHalfRelocation() argument 137 uint32_t FixupOffset = Asm.getFragmentOffset(*Fragment) + Fixup.getOffset(); in recordARMScatteredHalfRelocation() 140 Asm.getContext().reportError(Fixup.getLoc(), in recordARMScatteredHalfRelocation() 147 unsigned IsPCRel = Writer->isFixupKindPCRel(Asm, Fixup.getKind()); in recordARMScatteredHalfRelocation() 154 Asm.getContext().reportError(Fixup.getLoc(), in recordARMScatteredHalfRelocation() 169 Asm.getContext().reportError(Fixup.getLoc(), in recordARMScatteredHalfRelocation() 197 switch (Fixup.getTargetKind()) { in recordARMScatteredHalfRelocation() [all …]
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H A D | ARMELFObjectWriter.cpp | 31 unsigned GetRelocTypeInner(const MCValue &Target, const MCFixup &Fixup, 40 const MCFixup &Fixup, bool IsPCRel) const override; 75 const MCFixup &Fixup, in getRelocType() argument 77 return GetRelocTypeInner(Target, Fixup, IsPCRel, Ctx); in getRelocType() 81 const MCFixup &Fixup, in GetRelocTypeInner() argument 84 unsigned Kind = Fixup.getTargetKind(); in GetRelocTypeInner() 90 Ctx.reportError(Fixup.getLoc(), in GetRelocTypeInner() 98 switch (Fixup.getTargetKind()) { in GetRelocTypeInner() 100 Ctx.reportError(Fixup.getLoc(), "unsupported relocation type"); in GetRelocTypeInner() 105 Ctx.reportError(Fixup.getLoc(), in GetRelocTypeInner() [all …]
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H A D | ARMAsmBackend.cpp | 260 const char *ARMAsmBackend::reasonForFixupRelaxation(const MCFixup &Fixup, in reasonForFixupRelaxation() argument 262 switch (Fixup.getTargetKind()) { in reasonForFixupRelaxation() 339 bool ARMAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup, in fixupNeedsRelaxation() argument 341 return reasonForFixupRelaxation(Fixup, Value); in fixupNeedsRelaxation() 443 const MCFixup &Fixup, in adjustFixupValue() argument 447 unsigned Kind = Fixup.getKind(); in adjustFixupValue() 533 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value"); in adjustFixupValue() 554 Ctx.reportError(Fixup.getLoc(), "out of range pc-relative fixup value"); in adjustFixupValue() 585 dyn_cast<MCSymbolRefExpr>(Fixup.getValue())) in adjustFixupValue() 592 Ctx.reportError(Fixup.getLoc(), "Relocation out of range"); in adjustFixupValue() [all …]
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H A D | ARMWinCOFFObjectWriter.cpp | 36 const MCFixup &Fixup, bool IsCrossSection, 46 const MCFixup &Fixup, in getRelocType() 52 unsigned FixupKind = Fixup.getKind(); in getRelocType() 55 Ctx.reportError(Fixup.getLoc(), "Cannot represent this expression"); in getRelocType() 64 const MCFixupKindInfo &Info = MAB.getFixupKindInfo(Fixup.getKind()); in getRelocType() 95 bool ARMWinCOFFObjectWriter::recordRelocation(const MCFixup &Fixup) const { 96 return static_cast<unsigned>(Fixup.getKind()) != ARM::fixup_t2_movt_hi16; in recordRelocation() 47 getRelocType(MCContext & Ctx,const MCValue & Target,const MCFixup & Fixup,bool IsCrossSection,const MCAsmBackend & MAB) const getRelocType() argument
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
H A D | AMDGPUAsmBackend.cpp | 36 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, 40 bool fixupNeedsRelaxation(const MCFixup &Fixup, 55 bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup, 71 bool AMDGPUAsmBackend::fixupNeedsRelaxation(const MCFixup &Fixup, in fixupNeedsRelaxation() argument 112 static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value, in adjustFixupValue() argument 116 switch (Fixup.getTargetKind()) { in adjustFixupValue() 121 Ctx->reportError(Fixup.getLoc(), "branch size exceeds simm16"); in adjustFixupValue() 137 void AMDGPUAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, in applyFixup() argument 142 if (Fixup.getKind() >= FirstLiteralRelocationKind) in applyFixup() 145 Value = adjustFixupValue(Fixup, Value, &Asm.getContext()); in applyFixup() [all …]
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H A D | AMDGPUMCExpr.cpp | 98 const MCFixup *Fixup) const { in evaluateExtraSGPRs() 101 if (!Arg->evaluateAsRelocatable(MCVal, Asm, Fixup) || !MCVal.isAbsolute()) in evaluateExtraSGPRs() 127 const MCFixup *Fixup) const { in evaluateTotalNumVGPR() 130 if (!Arg->evaluateAsRelocatable(MCVal, Asm, Fixup) || !MCVal.isAbsolute()) in evaluateTotalNumVGPR() 154 const MCFixup *Fixup) const { in evaluateAlignTo() 157 if (!Arg->evaluateAsRelocatable(MCVal, Asm, Fixup) || !MCVal.isAbsolute()) in evaluateAlignTo() 175 const MCFixup *Fixup) const { in evaluateOccupancy() 178 if (!Arg->evaluateAsRelocatable(MCVal, Asm, Fixup) || !MCVal.isAbsolute()) in evaluateOccupancy() 219 const MCFixup *Fixup) const { in evaluateAsRelocatableImpl() 225 return evaluateExtraSGPRs(Res, Asm, Fixup); in evaluateAsRelocatableImpl() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/MCTargetDesc/ |
H A D | MSP430AsmBackend.cpp | 32 uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value, 40 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, 51 const MCFixup &Fixup, bool Resolved, in fixupNeedsRelaxationAdvanced() argument 91 uint64_t MSP430AsmBackend::adjustFixupValue(const MCFixup &Fixup, in adjustFixupValue() argument 94 unsigned Kind = Fixup.getKind(); in adjustFixupValue() 98 Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned"); in adjustFixupValue() 108 Ctx.reportError(Fixup.getLoc(), "fixup value out of range"); in adjustFixupValue() 120 void MSP430AsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, in applyFixup() argument 125 Value = adjustFixupValue(Fixup, Value, Asm.getContext()); in applyFixup() 126 MCFixupKindInfo Info = getFixupKindInfo(Fixup.getKind()); in applyFixup() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsAsmBackend.cpp | 39 static unsigned adjustFixupValue(const MCFixup &Fixup, uint64_t Value, in adjustFixupValue() argument 42 unsigned Kind = Fixup.getKind(); in adjustFixupValue() 83 Ctx.reportError(Fixup.getLoc(), "out of range PC16 fixup"); in adjustFixupValue() 93 Ctx.reportError(Fixup.getLoc(), "out of range PC19 fixup"); in adjustFixupValue() 132 Ctx.reportError(Fixup.getLoc(), "out of range PC7 fixup"); in adjustFixupValue() 142 Ctx.reportError(Fixup.getLoc(), "out of range PC10 fixup"); in adjustFixupValue() 152 Ctx.reportError(Fixup.getLoc(), "out of range PC16 fixup"); in adjustFixupValue() 161 Ctx.reportError(Fixup.getLoc(), "out of range PC18 fixup"); in adjustFixupValue() 168 Ctx.reportError(Fixup.getLoc(), "out of range PC18 fixup"); in adjustFixupValue() 174 Ctx.reportError(Fixup.getLoc(), "out of range PC18 fixup"); in adjustFixupValue() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/MCTargetDesc/ |
H A D | LoongArchAsmBackend.cpp | 89 static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value, in adjustFixupValue() argument 91 switch (Fixup.getTargetKind()) { in adjustFixupValue() 102 reportOutOfRangeError(Ctx, Fixup.getLoc(), 18); in adjustFixupValue() 104 Ctx.reportError(Fixup.getLoc(), "fixup value must be 4-byte aligned"); in adjustFixupValue() 109 reportOutOfRangeError(Ctx, Fixup.getLoc(), 23); in adjustFixupValue() 111 Ctx.reportError(Fixup.getLoc(), "fixup value must be 4-byte aligned"); in adjustFixupValue() 116 reportOutOfRangeError(Ctx, Fixup.getLoc(), 28); in adjustFixupValue() 118 Ctx.reportError(Fixup.getLoc(), "fixup value must be 4-byte aligned"); in adjustFixupValue() 136 static void fixupLeb128(MCContext &Ctx, const MCFixup &Fixup, in fixupLeb128() argument 142 Ctx.reportError(Fixup.getLoc(), "Invalid uleb128 value!"); in fixupLeb128() [all …]
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H A D | LoongArchELFObjectWriter.cpp | 34 const MCFixup &Fixup, bool IsPCRel) const override; in LoongArchELFObjectWriter() 49 const MCFixup &Fixup, in getRelocType() 52 unsigned Kind = Fixup.getTargetKind(); in getRelocType() 59 Ctx.reportError(Fixup.getLoc(), "Unsupported relocation type"); in getRelocType() 62 Ctx.reportError(Fixup.getLoc(), "1-byte data relocations not supported"); in getRelocType() 65 Ctx.reportError(Fixup.getLoc(), "2-byte data relocations not supported"); in getRelocType() 41 getRelocType(MCContext & Ctx,const MCValue & Target,const MCFixup & Fixup,bool IsPCRel) const getRelocType() argument
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/MCTargetDesc/ |
H A D | SystemZMCAsmBackend.cpp | 27 const MCFixup &Fixup, MCContext &Ctx) { in extractBitsForFixup() argument 34 Ctx.reportError(Fixup.getLoc(), "operand out of range (" + Twine(SVal) + in extractBitsForFixup() 44 Ctx.reportError(Fixup.getLoc(), "Non-even PC relative offset."); in extractBitsForFixup() 118 bool shouldForceRelocation(const MCAssembler &Asm, const MCFixup &Fixup, 121 void applyFixup(const MCAssembler &Asm, const MCFixup &Fixup, 163 const MCFixup &Fixup, in shouldForceRelocation() argument 166 return Fixup.getKind() >= FirstLiteralRelocationKind; in shouldForceRelocation() 170 const MCFixup &Fixup, in applyFixup() argument 175 MCFixupKind Kind = Fixup.getKind(); in applyFixup() 178 unsigned Offset = Fixup.getOffset(); in applyFixup() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/MCTargetDesc/ |
H A D | PPCMCExpr.cpp | 103 const MCFixup *Fixup) const { in evaluateAsRelocatableImpl() 106 if (!getSubExpr()->evaluateAsRelocatable(Value, Asm, Fixup)) in evaluateAsRelocatableImpl() 111 bool IsHalf16 = Fixup && Fixup->getTargetKind() == PPC::fixup_ppc_half16; in evaluateAsRelocatableImpl() 113 Fixup && Fixup->getTargetKind() == PPC::fixup_ppc_half16ds; in evaluateAsRelocatableImpl() 115 Fixup && Fixup->getTargetKind() == PPC::fixup_ppc_half16dq; in evaluateAsRelocatableImpl()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/MCTargetDesc/ |
H A D | SparcELFObjectWriter.cpp | 35 const MCFixup &Fixup, bool IsPCRel) const override; 44 const MCFixup &Fixup, in getRelocType() argument 46 MCFixupKind Kind = Fixup.getKind(); in getRelocType() 50 if (const SparcMCExpr *SExpr = dyn_cast<SparcMCExpr>(Fixup.getValue())) { in getRelocType() 56 switch(Fixup.getTargetKind()) { in getRelocType() 74 switch(Fixup.getTargetKind()) { in getRelocType() 79 case FK_Data_2: return ((Fixup.getOffset() % 2) in getRelocType() 82 case FK_Data_4: return ((Fixup.getOffset() % 4) in getRelocType() 85 case FK_Data_8: return ((Fixup.getOffset() % 8) in getRelocType()
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