10b57cec5SDimitry Andric //===-- SparcELFObjectWriter.cpp - Sparc ELF Writer -----------------------===//
20b57cec5SDimitry Andric //
30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
60b57cec5SDimitry Andric //
70b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
80b57cec5SDimitry Andric
90b57cec5SDimitry Andric #include "MCTargetDesc/SparcFixupKinds.h"
100b57cec5SDimitry Andric #include "MCTargetDesc/SparcMCExpr.h"
110b57cec5SDimitry Andric #include "MCTargetDesc/SparcMCTargetDesc.h"
120b57cec5SDimitry Andric #include "llvm/ADT/STLExtras.h"
130b57cec5SDimitry Andric #include "llvm/MC/MCELFObjectWriter.h"
140b57cec5SDimitry Andric #include "llvm/MC/MCExpr.h"
150b57cec5SDimitry Andric #include "llvm/MC/MCObjectWriter.h"
160b57cec5SDimitry Andric #include "llvm/MC/MCValue.h"
170b57cec5SDimitry Andric #include "llvm/Support/ErrorHandling.h"
180b57cec5SDimitry Andric
190b57cec5SDimitry Andric using namespace llvm;
200b57cec5SDimitry Andric
210b57cec5SDimitry Andric namespace {
220b57cec5SDimitry Andric class SparcELFObjectWriter : public MCELFObjectTargetWriter {
230b57cec5SDimitry Andric public:
SparcELFObjectWriter(bool Is64Bit,bool HasV9,uint8_t OSABI)24*0fca6ea1SDimitry Andric SparcELFObjectWriter(bool Is64Bit, bool HasV9, uint8_t OSABI)
25*0fca6ea1SDimitry Andric : MCELFObjectTargetWriter(
26*0fca6ea1SDimitry Andric Is64Bit, OSABI,
27*0fca6ea1SDimitry Andric Is64Bit ? ELF::EM_SPARCV9
28*0fca6ea1SDimitry Andric : (HasV9 ? ELF::EM_SPARC32PLUS : ELF::EM_SPARC),
290b57cec5SDimitry Andric /*HasRelocationAddend*/ true) {}
300b57cec5SDimitry Andric
3181ad6265SDimitry Andric ~SparcELFObjectWriter() override = default;
320b57cec5SDimitry Andric
330b57cec5SDimitry Andric protected:
340b57cec5SDimitry Andric unsigned getRelocType(MCContext &Ctx, const MCValue &Target,
350b57cec5SDimitry Andric const MCFixup &Fixup, bool IsPCRel) const override;
360b57cec5SDimitry Andric
375f757f3fSDimitry Andric bool needsRelocateWithSymbol(const MCValue &Val, const MCSymbol &Sym,
380b57cec5SDimitry Andric unsigned Type) const override;
390b57cec5SDimitry Andric };
400b57cec5SDimitry Andric }
410b57cec5SDimitry Andric
getRelocType(MCContext & Ctx,const MCValue & Target,const MCFixup & Fixup,bool IsPCRel) const420b57cec5SDimitry Andric unsigned SparcELFObjectWriter::getRelocType(MCContext &Ctx,
430b57cec5SDimitry Andric const MCValue &Target,
440b57cec5SDimitry Andric const MCFixup &Fixup,
450b57cec5SDimitry Andric bool IsPCRel) const {
461fd87a68SDimitry Andric MCFixupKind Kind = Fixup.getKind();
471fd87a68SDimitry Andric if (Kind >= FirstLiteralRelocationKind)
481fd87a68SDimitry Andric return Kind - FirstLiteralRelocationKind;
490b57cec5SDimitry Andric
500b57cec5SDimitry Andric if (const SparcMCExpr *SExpr = dyn_cast<SparcMCExpr>(Fixup.getValue())) {
510b57cec5SDimitry Andric if (SExpr->getKind() == SparcMCExpr::VK_Sparc_R_DISP32)
520b57cec5SDimitry Andric return ELF::R_SPARC_DISP32;
530b57cec5SDimitry Andric }
540b57cec5SDimitry Andric
550b57cec5SDimitry Andric if (IsPCRel) {
568bcb0991SDimitry Andric switch(Fixup.getTargetKind()) {
570b57cec5SDimitry Andric default:
580b57cec5SDimitry Andric llvm_unreachable("Unimplemented fixup -> relocation");
590b57cec5SDimitry Andric case FK_Data_1: return ELF::R_SPARC_DISP8;
600b57cec5SDimitry Andric case FK_Data_2: return ELF::R_SPARC_DISP16;
610b57cec5SDimitry Andric case FK_Data_4: return ELF::R_SPARC_DISP32;
620b57cec5SDimitry Andric case FK_Data_8: return ELF::R_SPARC_DISP64;
630b57cec5SDimitry Andric case Sparc::fixup_sparc_call30: return ELF::R_SPARC_WDISP30;
640b57cec5SDimitry Andric case Sparc::fixup_sparc_br22: return ELF::R_SPARC_WDISP22;
650b57cec5SDimitry Andric case Sparc::fixup_sparc_br19: return ELF::R_SPARC_WDISP19;
6606c3fb27SDimitry Andric case Sparc::fixup_sparc_br16:
6706c3fb27SDimitry Andric return ELF::R_SPARC_WDISP16;
680b57cec5SDimitry Andric case Sparc::fixup_sparc_pc22: return ELF::R_SPARC_PC22;
690b57cec5SDimitry Andric case Sparc::fixup_sparc_pc10: return ELF::R_SPARC_PC10;
700b57cec5SDimitry Andric case Sparc::fixup_sparc_wplt30: return ELF::R_SPARC_WPLT30;
710b57cec5SDimitry Andric }
720b57cec5SDimitry Andric }
730b57cec5SDimitry Andric
748bcb0991SDimitry Andric switch(Fixup.getTargetKind()) {
750b57cec5SDimitry Andric default:
760b57cec5SDimitry Andric llvm_unreachable("Unimplemented fixup -> relocation");
771fd87a68SDimitry Andric case FK_NONE: return ELF::R_SPARC_NONE;
780b57cec5SDimitry Andric case FK_Data_1: return ELF::R_SPARC_8;
790b57cec5SDimitry Andric case FK_Data_2: return ((Fixup.getOffset() % 2)
800b57cec5SDimitry Andric ? ELF::R_SPARC_UA16
810b57cec5SDimitry Andric : ELF::R_SPARC_16);
820b57cec5SDimitry Andric case FK_Data_4: return ((Fixup.getOffset() % 4)
830b57cec5SDimitry Andric ? ELF::R_SPARC_UA32
840b57cec5SDimitry Andric : ELF::R_SPARC_32);
850b57cec5SDimitry Andric case FK_Data_8: return ((Fixup.getOffset() % 8)
860b57cec5SDimitry Andric ? ELF::R_SPARC_UA64
870b57cec5SDimitry Andric : ELF::R_SPARC_64);
880b57cec5SDimitry Andric case Sparc::fixup_sparc_13: return ELF::R_SPARC_13;
890b57cec5SDimitry Andric case Sparc::fixup_sparc_hi22: return ELF::R_SPARC_HI22;
900b57cec5SDimitry Andric case Sparc::fixup_sparc_lo10: return ELF::R_SPARC_LO10;
910b57cec5SDimitry Andric case Sparc::fixup_sparc_h44: return ELF::R_SPARC_H44;
920b57cec5SDimitry Andric case Sparc::fixup_sparc_m44: return ELF::R_SPARC_M44;
930b57cec5SDimitry Andric case Sparc::fixup_sparc_l44: return ELF::R_SPARC_L44;
940b57cec5SDimitry Andric case Sparc::fixup_sparc_hh: return ELF::R_SPARC_HH22;
950b57cec5SDimitry Andric case Sparc::fixup_sparc_hm: return ELF::R_SPARC_HM10;
96fe6060f1SDimitry Andric case Sparc::fixup_sparc_lm: return ELF::R_SPARC_LM22;
970b57cec5SDimitry Andric case Sparc::fixup_sparc_got22: return ELF::R_SPARC_GOT22;
980b57cec5SDimitry Andric case Sparc::fixup_sparc_got10: return ELF::R_SPARC_GOT10;
990b57cec5SDimitry Andric case Sparc::fixup_sparc_got13: return ELF::R_SPARC_GOT13;
1000b57cec5SDimitry Andric case Sparc::fixup_sparc_tls_gd_hi22: return ELF::R_SPARC_TLS_GD_HI22;
1010b57cec5SDimitry Andric case Sparc::fixup_sparc_tls_gd_lo10: return ELF::R_SPARC_TLS_GD_LO10;
1020b57cec5SDimitry Andric case Sparc::fixup_sparc_tls_gd_add: return ELF::R_SPARC_TLS_GD_ADD;
1030b57cec5SDimitry Andric case Sparc::fixup_sparc_tls_gd_call: return ELF::R_SPARC_TLS_GD_CALL;
1040b57cec5SDimitry Andric case Sparc::fixup_sparc_tls_ldm_hi22: return ELF::R_SPARC_TLS_LDM_HI22;
1050b57cec5SDimitry Andric case Sparc::fixup_sparc_tls_ldm_lo10: return ELF::R_SPARC_TLS_LDM_LO10;
1060b57cec5SDimitry Andric case Sparc::fixup_sparc_tls_ldm_add: return ELF::R_SPARC_TLS_LDM_ADD;
1070b57cec5SDimitry Andric case Sparc::fixup_sparc_tls_ldm_call: return ELF::R_SPARC_TLS_LDM_CALL;
1080b57cec5SDimitry Andric case Sparc::fixup_sparc_tls_ldo_hix22: return ELF::R_SPARC_TLS_LDO_HIX22;
1090b57cec5SDimitry Andric case Sparc::fixup_sparc_tls_ldo_lox10: return ELF::R_SPARC_TLS_LDO_LOX10;
1100b57cec5SDimitry Andric case Sparc::fixup_sparc_tls_ldo_add: return ELF::R_SPARC_TLS_LDO_ADD;
1110b57cec5SDimitry Andric case Sparc::fixup_sparc_tls_ie_hi22: return ELF::R_SPARC_TLS_IE_HI22;
1120b57cec5SDimitry Andric case Sparc::fixup_sparc_tls_ie_lo10: return ELF::R_SPARC_TLS_IE_LO10;
1130b57cec5SDimitry Andric case Sparc::fixup_sparc_tls_ie_ld: return ELF::R_SPARC_TLS_IE_LD;
1140b57cec5SDimitry Andric case Sparc::fixup_sparc_tls_ie_ldx: return ELF::R_SPARC_TLS_IE_LDX;
1150b57cec5SDimitry Andric case Sparc::fixup_sparc_tls_ie_add: return ELF::R_SPARC_TLS_IE_ADD;
1160b57cec5SDimitry Andric case Sparc::fixup_sparc_tls_le_hix22: return ELF::R_SPARC_TLS_LE_HIX22;
1170b57cec5SDimitry Andric case Sparc::fixup_sparc_tls_le_lox10: return ELF::R_SPARC_TLS_LE_LOX10;
11881ad6265SDimitry Andric case Sparc::fixup_sparc_hix22: return ELF::R_SPARC_HIX22;
11981ad6265SDimitry Andric case Sparc::fixup_sparc_lox10: return ELF::R_SPARC_LOX10;
12081ad6265SDimitry Andric case Sparc::fixup_sparc_gotdata_hix22: return ELF::R_SPARC_GOTDATA_HIX22;
12181ad6265SDimitry Andric case Sparc::fixup_sparc_gotdata_lox10: return ELF::R_SPARC_GOTDATA_LOX10;
12281ad6265SDimitry Andric case Sparc::fixup_sparc_gotdata_op: return ELF::R_SPARC_GOTDATA_OP;
1230b57cec5SDimitry Andric }
1240b57cec5SDimitry Andric
1250b57cec5SDimitry Andric return ELF::R_SPARC_NONE;
1260b57cec5SDimitry Andric }
1270b57cec5SDimitry Andric
needsRelocateWithSymbol(const MCValue &,const MCSymbol &,unsigned Type) const1285f757f3fSDimitry Andric bool SparcELFObjectWriter::needsRelocateWithSymbol(const MCValue &,
1295f757f3fSDimitry Andric const MCSymbol &,
1300b57cec5SDimitry Andric unsigned Type) const {
1310b57cec5SDimitry Andric switch (Type) {
1320b57cec5SDimitry Andric default:
1330b57cec5SDimitry Andric return false;
1340b57cec5SDimitry Andric
1350b57cec5SDimitry Andric // All relocations that use a GOT need a symbol, not an offset, as
1360b57cec5SDimitry Andric // the offset of the symbol within the section is irrelevant to
1370b57cec5SDimitry Andric // where the GOT entry is. Don't need to list all the TLS entries,
1380b57cec5SDimitry Andric // as they're all marked as requiring a symbol anyways.
1390b57cec5SDimitry Andric case ELF::R_SPARC_GOT10:
1400b57cec5SDimitry Andric case ELF::R_SPARC_GOT13:
1410b57cec5SDimitry Andric case ELF::R_SPARC_GOT22:
1420b57cec5SDimitry Andric case ELF::R_SPARC_GOTDATA_HIX22:
1430b57cec5SDimitry Andric case ELF::R_SPARC_GOTDATA_LOX10:
1440b57cec5SDimitry Andric case ELF::R_SPARC_GOTDATA_OP_HIX22:
1450b57cec5SDimitry Andric case ELF::R_SPARC_GOTDATA_OP_LOX10:
1460b57cec5SDimitry Andric return true;
1470b57cec5SDimitry Andric }
1480b57cec5SDimitry Andric }
1490b57cec5SDimitry Andric
1500b57cec5SDimitry Andric std::unique_ptr<MCObjectTargetWriter>
createSparcELFObjectWriter(bool Is64Bit,bool HasV9,uint8_t OSABI)151*0fca6ea1SDimitry Andric llvm::createSparcELFObjectWriter(bool Is64Bit, bool HasV9, uint8_t OSABI) {
152*0fca6ea1SDimitry Andric return std::make_unique<SparcELFObjectWriter>(Is64Bit, HasV9, OSABI);
1530b57cec5SDimitry Andric }
154