115                                             const MCFixup &Fixup,  in shouldForceRelocation()  argument
118   if (Fixup.getKind() >= FirstLiteralRelocationKind)  in shouldForceRelocation()
120   switch (Fixup.getTargetKind()) {  in shouldForceRelocation()
142     const MCAssembler &Asm, const MCFixup &Fixup, bool Resolved, uint64_t Value,  in fixupNeedsRelaxationAdvanced()  argument
148   unsigned Kind = Fixup.getTargetKind();  in fixupNeedsRelaxationAdvanced()
231   std::pair<MCFixupKind, MCFixupKind> Fixup;  in relaxDwarfLineAddr()  local
245     Fixup = RISCV::getRelocPairForSize(PtrSize);  in relaxDwarfLineAddr()
250     Fixup = RISCV::getRelocPairForSize(2);  in relaxDwarfLineAddr()
255   Fixups.push_back(MCFixup::create(Offset, MBE.getLHS(), std::get<0>(Fixup)));  in relaxDwarfLineAddr()
256   Fixups.push_back(MCFixup::create(Offset, MBE.getRHS(), std::get<1>(Fixup)));  in relaxDwarfLineAddr()
297                                          std::pair<unsigned, unsigned> Fixup) {  in relaxDwarfCFA()  argument
302                                                  std::get<0>(Fixup))));  in relaxDwarfCFA()
306                                                  std::get<1>(Fixup))));  in relaxDwarfCFA()
406 static uint64_t adjustFixupValue(const MCFixup &Fixup, uint64_t Value,  in adjustFixupValue()  argument
408   switch (Fixup.getTargetKind()) {  in adjustFixupValue()
429       Ctx.reportError(Fixup.getLoc(),  in adjustFixupValue()
444       Ctx.reportError(Fixup.getLoc(), "fixup value out of range");  in adjustFixupValue()
446       Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned");  in adjustFixupValue()
461       Ctx.reportError(Fixup.getLoc(), "fixup value out of range");  in adjustFixupValue()
463       Ctx.reportError(Fixup.getLoc(), "fixup value must be 2-byte aligned");  in adjustFixupValue()
488       Ctx.reportError(Fixup.getLoc(), "fixup value out of range");  in adjustFixupValue()
504       Ctx.reportError(Fixup.getLoc(), "fixup value out of range");  in adjustFixupValue()
520                                           const MCFixup &Fixup,  in evaluateTargetFixup()  argument
528   switch (Fixup.getTargetKind()) {  in evaluateTargetFixup()
533     AUIPCFixup = &Fixup;  in evaluateTargetFixup()
539     AUIPCFixup = cast<RISCVMCExpr>(Fixup.getValue())->getPCRelHiFixup(&AUIPCDF);  in evaluateTargetFixup()
541       Asm.getContext().reportError(Fixup.getLoc(),  in evaluateTargetFixup()
581                                               const MCFixup &Fixup,  in handleAddSubRelocations()  argument
586   switch (Fixup.getKind()) {  in handleAddSubRelocations()
613       Fixup.getOffset(), nullptr,  in handleAddSubRelocations()
616       Fixup.getOffset(), nullptr,  in handleAddSubRelocations()
625 void RISCVAsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,  in applyFixup()  argument
630   MCFixupKind Kind = Fixup.getKind();  in applyFixup()
638   Value = adjustFixupValue(Fixup, Value, Ctx);  in applyFixup()
643   unsigned Offset = Fixup.getOffset();  in applyFixup()
699   MCFixup Fixup =  in shouldInsertFixupForCodeAlign()  local
705   Asm.getWriter().recordRelocation(Asm, &AF, Fixup, NopBytes, FixedValue);  in shouldInsertFixupForCodeAlign()