| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | ConstrainedOps.def | 93 DAG_FUNCTION(nearbyint, 1, 1, experimental_constrained_nearbyint, FNEARBYINT)
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| H A D | VPIntrinsics.def | 470 VP_PROPERTY_FUNCTIONAL_SDOPC(FNEARBYINT)
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 990 FNEARBYINT, enumerator
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| H A D | BasicTTIImpl.h | 2049 ISD = ISD::FNEARBYINT; in getTypeBasedIntrinsicInstrCost()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | SelectionDAGDumper.cpp | 237 case ISD::FNEARBYINT: return "fnearbyint"; in getOperationName()
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| H A D | LegalizeFloatTypes.cpp | 113 case ISD::FNEARBYINT: R = SoftenFloatRes_FNEARBYINT(N); break; in SoftenFloatResult()
1443 case ISD::FNEARBYINT: ExpandFloatRes_FNEARBYINT(N, Lo, Hi); break; in ExpandFloatResult()
2612 case ISD::FNEARBYINT: in PromoteFloatResult()
3053 case ISD::FNEARBYINT: in SoftPromoteHalfResult()
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| H A D | LegalizeVectorOps.cpp | 423 case ISD::FNEARBYINT: in LegalizeOp()
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| H A D | LegalizeVectorTypes.cpp | 105 case ISD::FNEARBYINT: in ScalarizeVectorResult()
1181 case ISD::FNEARBYINT: in SplitVectorResult()
4543 case ISD::FNEARBYINT: in WidenVectorResult()
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| H A D | LegalizeDAG.cpp | 4628 case ISD::FNEARBYINT: in ConvertNodeToLibcall()
5535 case ISD::FNEARBYINT: in PromoteNode()
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| H A D | SelectionDAGBuilder.cpp | 6830 case Intrinsic::nearbyint: Opcode = ISD::FNEARBYINT; break; in visitIntrinsicCall()
9332 if (visitUnaryFloatCall(I, ISD::FNEARBYINT)) in visitCall()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 405 setOperationAction(ISD::FNEARBYINT, {MVT::f16, MVT::f32, MVT::f64}, Custom); in AMDGPUTargetLowering()
536 ISD::FMA, ISD::FRINT, ISD::FNEARBYINT, in AMDGPUTargetLowering()
662 case ISD::FNEARBYINT: in fnegFoldsIntoOpcode()
1385 case ISD::FNEARBYINT: return LowerFNEARBYINT(Op, DAG); in LowerOperation()
4888 case ISD::FNEARBYINT: // XXX - Should fround be handled? in performFNegCombine()
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| H A D | AMDGPUISelDAGToDAG.cpp | 162 case ISD::FNEARBYINT: in fp16SrcZerosHighBits()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetLoweringBase.cpp | 829 ISD::FNEARBYINT, ISD::FCEIL, ISD::FRINT, ISD::FTRUNC, in initActions()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.cpp | 326 setOperationAction(ISD::FNEARBYINT, MVT::ppcf128, Expand); in PPCTargetLowering()
869 setOperationAction(ISD::FNEARBYINT, VT, Expand); in PPCTargetLowering()
931 setOperationAction(ISD::FNEARBYINT, MVT::v4f32, Legal); in PPCTargetLowering()
1022 setOperationAction(ISD::FNEARBYINT, MVT::f64, Legal); in PPCTargetLowering()
1023 setOperationAction(ISD::FNEARBYINT, MVT::f32, Legal); in PPCTargetLowering()
1029 setOperationAction(ISD::FNEARBYINT, MVT::v2f64, Legal); in PPCTargetLowering()
1035 setOperationAction(ISD::FNEARBYINT, MVT::v4f32, Legal); in PPCTargetLowering()
1238 setOperationAction(ISD::FNEARBYINT, MVT::f128, Legal); in PPCTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 503 setOperationAction(ISD::FNEARBYINT, MVT::f16, in RISCVTargetLowering()
548 setOperationAction(ISD::FNEARBYINT, MVT::f32, Legal); in RISCVTargetLowering()
566 setOperationAction(ISD::FNEARBYINT, MVT::f64, Legal); in RISCVTargetLowering()
951 ISD::FNEARBYINT, ISD::IS_FPCLASS, ISD::SETCC, ISD::FMAXIMUM, in RISCVTargetLowering()
986 ISD::FROUNDEVEN, ISD::FRINT, ISD::FNEARBYINT, in RISCVTargetLowering()
1375 ISD::FROUNDEVEN, ISD::FRINT, ISD::FNEARBYINT}, in RISCVTargetLowering()
3123 case ISD::FNEARBYINT: in lowerVectorFTRUNC_FCEIL_FFLOOR_FROUND()
6767 case ISD::FNEARBYINT: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelDAGToDAG.cpp | 1216 case ISD::FNEARBYINT: in PreprocessISelDAG()
1234 case ISD::FNEARBYINT: Imm = 0xC; break; in PreprocessISelDAG()
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| H A D | X86ISelLowering.cpp | 624 setOperationAction(ISD::FNEARBYINT, VT, Action); in X86TargetLowering()
849 setOperationAction(ISD::FNEARBYINT, MVT::f80, Expand); in X86TargetLowering()
990 setOperationAction(ISD::FNEARBYINT, VT, Expand); in X86TargetLowering()
1339 setOperationAction(ISD::FNEARBYINT, RoundedTy, Legal); in X86TargetLowering()
1440 setOperationAction(ISD::FNEARBYINT, VT, Legal); in X86TargetLowering()
1886 setOperationAction(ISD::FNEARBYINT, VT, Legal); in X86TargetLowering()
2192 setOperationAction(ISD::FNEARBYINT, VT, Legal); in X86TargetLowering()
44967 case ISD::FNEARBYINT: in scalarizeExtEltFP()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 136 for (auto Op : {ISD::FCEIL, ISD::FFLOOR, ISD::FTRUNC, ISD::FNEARBYINT, in WebAssemblyTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 452 case ISD::FNEARBYINT: in NVPTXTargetLowering()
769 for (const auto &Op : {ISD::FCEIL, ISD::FFLOOR, ISD::FNEARBYINT, ISD::FRINT, in NVPTXTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 768 ISD::FNEARBYINT, in AArch64TargetLowering()
819 setOperationPromotedToType(ISD::FNEARBYINT, V4Narrow, MVT::v4f32); in AArch64TargetLowering()
840 setOperationAction(ISD::FNEARBYINT, V8Narrow, Legal); in AArch64TargetLowering()
864 {ISD::FFLOOR, ISD::FNEARBYINT, ISD::FCEIL, in AArch64TargetLowering()
1187 ISD::FSQRT, ISD::FFLOOR, ISD::FNEARBYINT, in AArch64TargetLowering()
1349 {ISD::FFLOOR, ISD::FNEARBYINT, ISD::FCEIL, ISD::FRINT, ISD::FTRUNC, in AArch64TargetLowering()
1602 setOperationAction(ISD::FNEARBYINT, VT, Custom); in AArch64TargetLowering()
2062 setOperationAction(ISD::FNEARBYINT, VT, Default); in addTypeForFixedLengthSVE()
6827 case ISD::FNEARBYINT: in LowerOperation()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 519 setOperationAction(ISD::FNEARBYINT, VT, Legal); in SystemZTargetLowering()
579 setOperationAction(ISD::FNEARBYINT, MVT::v2f64, Legal); in SystemZTargetLowering()
620 setOperationAction(ISD::FNEARBYINT, MVT::v4f32, Legal); in SystemZTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 387 setOperationAction(ISD::FNEARBYINT, VT, Expand); in addMVEVectorTypes()
894 setOperationAction(ISD::FNEARBYINT, MVT::v2f64, Expand); in ARMTargetLowering()
916 setOperationAction(ISD::FNEARBYINT, MVT::v4f32, Expand); in ARMTargetLowering()
934 setOperationAction(ISD::FNEARBYINT, MVT::v2f32, Expand); in ARMTargetLowering()
1076 setOperationAction(ISD::FNEARBYINT, MVT::f64, Expand); in ARMTargetLowering()
1515 setOperationAction(ISD::FNEARBYINT, MVT::f32, Legal); in ARMTargetLowering()
1531 setOperationAction(ISD::FNEARBYINT, MVT::f64, Legal); in ARMTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Target/ |
| H A D | TargetSelectionDAG.td | 543 def fnearbyint : SDNode<"ISD::FNEARBYINT" , SDTFPUnaryOp>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1506 // FLOG, FLOG2, FLOG10, FMAXNUM, FMINNUM, FNEARBYINT, FRINT, FROUND, TRAP, in HexagonTargetLowering()
1657 ISD::FRINT, ISD::FNEARBYINT, ISD::FROUND, ISD::FFLOOR, in HexagonTargetLowering()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSEISelLowering.cpp | 141 setOperationAction(ISD::FNEARBYINT, MVT::f16, Promote); in MipsSETargetLowering()
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