10b57cec5SDimitry Andric //===- NVPTXSubtarget.cpp - NVPTX Subtarget Information -------------------===// 20b57cec5SDimitry Andric // 30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information. 50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 60b57cec5SDimitry Andric // 70b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 80b57cec5SDimitry Andric // 90b57cec5SDimitry Andric // This file implements the NVPTX specific subclass of TargetSubtarget. 100b57cec5SDimitry Andric // 110b57cec5SDimitry Andric //===----------------------------------------------------------------------===// 120b57cec5SDimitry Andric 130b57cec5SDimitry Andric #include "NVPTXSubtarget.h" 140b57cec5SDimitry Andric #include "NVPTXTargetMachine.h" 150b57cec5SDimitry Andric 160b57cec5SDimitry Andric using namespace llvm; 170b57cec5SDimitry Andric 180b57cec5SDimitry Andric #define DEBUG_TYPE "nvptx-subtarget" 190b57cec5SDimitry Andric 200b57cec5SDimitry Andric #define GET_SUBTARGETINFO_ENUM 210b57cec5SDimitry Andric #define GET_SUBTARGETINFO_TARGET_DESC 220b57cec5SDimitry Andric #define GET_SUBTARGETINFO_CTOR 230b57cec5SDimitry Andric #include "NVPTXGenSubtargetInfo.inc" 240b57cec5SDimitry Andric 250b57cec5SDimitry Andric static cl::opt<bool> 2681ad6265SDimitry Andric NoF16Math("nvptx-no-f16-math", cl::Hidden, 270b57cec5SDimitry Andric cl::desc("NVPTX Specific: Disable generation of f16 math ops."), 280b57cec5SDimitry Andric cl::init(false)); 290b57cec5SDimitry Andric // Pin the vtable to this file. 300b57cec5SDimitry Andric void NVPTXSubtarget::anchor() {} 310b57cec5SDimitry Andric 320b57cec5SDimitry Andric NVPTXSubtarget &NVPTXSubtarget::initializeSubtargetDependencies(StringRef CPU, 330b57cec5SDimitry Andric StringRef FS) { 340b57cec5SDimitry Andric // Provide the default CPU if we don't have one. 35bdd1243dSDimitry Andric TargetName = std::string(CPU.empty() ? "sm_30" : CPU); 360b57cec5SDimitry Andric 37e8d8bef9SDimitry Andric ParseSubtargetFeatures(TargetName, /*TuneCPU*/ TargetName, FS); 380b57cec5SDimitry Andric 39*5f757f3fSDimitry Andric // Re-map SM version numbers, SmVersion carries the regular SMs which do 40*5f757f3fSDimitry Andric // have relative order, while FullSmVersion allows distinguishing sm_90 from 41*5f757f3fSDimitry Andric // sm_90a, which would *not* be a subset of sm_91. 42*5f757f3fSDimitry Andric SmVersion = getSmVersion(); 43*5f757f3fSDimitry Andric 44bdd1243dSDimitry Andric // Set default to PTX 6.0 (CUDA 9.0) 450b57cec5SDimitry Andric if (PTXVersion == 0) { 46bdd1243dSDimitry Andric PTXVersion = 60; 470b57cec5SDimitry Andric } 480b57cec5SDimitry Andric 490b57cec5SDimitry Andric return *this; 500b57cec5SDimitry Andric } 510b57cec5SDimitry Andric 520b57cec5SDimitry Andric NVPTXSubtarget::NVPTXSubtarget(const Triple &TT, const std::string &CPU, 530b57cec5SDimitry Andric const std::string &FS, 540b57cec5SDimitry Andric const NVPTXTargetMachine &TM) 55e8d8bef9SDimitry Andric : NVPTXGenSubtargetInfo(TT, CPU, /*TuneCPU*/ CPU, FS), PTXVersion(0), 56*5f757f3fSDimitry Andric FullSmVersion(200), SmVersion(getSmVersion()), TM(TM), 5704eeddc0SDimitry Andric TLInfo(TM, initializeSubtargetDependencies(CPU, FS)) {} 580b57cec5SDimitry Andric 590b57cec5SDimitry Andric bool NVPTXSubtarget::hasImageHandles() const { 600b57cec5SDimitry Andric // Enable handles for Kepler+, where CUDA supports indirect surfaces and 610b57cec5SDimitry Andric // textures 620b57cec5SDimitry Andric if (TM.getDrvInterface() == NVPTX::CUDA) 630b57cec5SDimitry Andric return (SmVersion >= 30); 640b57cec5SDimitry Andric 650b57cec5SDimitry Andric // Disabled, otherwise 660b57cec5SDimitry Andric return false; 670b57cec5SDimitry Andric } 680b57cec5SDimitry Andric 690b57cec5SDimitry Andric bool NVPTXSubtarget::allowFP16Math() const { 700b57cec5SDimitry Andric return hasFP16Math() && NoF16Math == false; 710b57cec5SDimitry Andric } 72