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Searched refs:FCVTXN (Results 1 – 8 of 8) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h266 FCVTXN, enumerator
H A DAArch64SchedCyclone.td578 // FCVT,FCVTN,FCVTXN
H A DAArch64SchedNeoverseN1.td683 "^FCVTXN(v2|v4)f32$")>;
H A DAArch64SchedNeoverseV1.td915 "^FCVTXN(v[24]f32|v1i64)$")>;
H A DAArch64SchedNeoverseN2.td1075 "^FCVTXN(v2|v4)f32")>;
H A DAArch64SchedNeoverseV2.td1566 "^FCVTXN(v2|v4)f32")>;
H A DAArch64ISelLowering.cpp2615 MAKE_CASE(AArch64ISD::FCVTXN) in getTargetNodeName()
4316 Narrow = DAG.getNode(AArch64ISD::FCVTXN, dl, F32, Narrow); in LowerFP_ROUND()
20191 DAG.getNode(AArch64ISD::FCVTXN, DL, MVT::v2f32, HighLanesSrcVec); in performBuildVectorCombine()
20195 DAG.getNode(AArch64ISD::FCVTXN, DL, MVT::v2f32, LowLanesSrcVec); in performBuildVectorCombine()
H A DAArch64InstrInfo.td807 def AArch64fcvtxn_n: SDNode<"AArch64ISD::FCVTXN", SDTFPRoundOp>;
5283 defm FCVTXN : SIMDFPInexactCvtTwoVector<1, 0, 0b10110, "fcvtxn",