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Searched refs:ExtVT (Results 1 – 20 of 20) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp758 EVT LoadResultTy, EVT &ExtVT);
4166 EVT ExtVT = EVT::getIntegerVT(*DAG.getContext(), 1); in visitSUB() local
4168 ExtVT = EVT::getVectorVT(*DAG.getContext(), ExtVT, in visitSUB()
4170 if (TLI.getOperationAction(ISD::SIGN_EXTEND_INREG, ExtVT) == in visitSUB()
4173 DAG.getValueType(ExtVT)); in visitSUB()
6803 EVT LoadResultTy, EVT &ExtVT) { in isAndLoadExtLoad() argument
6809 ExtVT = EVT::getIntegerVT(*DAG.getContext(), ActiveBits); in isAndLoadExtLoad()
6812 if (ExtVT == LoadedVT && in isAndLoadExtLoad()
6814 TLI.isLoadExtLegal(ISD::ZEXTLOAD, LoadResultTy, ExtVT))) { in isAndLoadExtLoad()
6826 if (!LoadedVT.bitsGT(ExtVT) || !ExtVT.isRound()) in isAndLoadExtLoad()
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H A DTargetLowering.cpp2119 EVT ExtVT = EVT::getIntegerVT(*TLO.DAG.getContext(), LowBits); in SimplifyDemandedBits() local
2121 ExtVT = EVT::getVectorVT(*TLO.DAG.getContext(), ExtVT, in SimplifyDemandedBits()
2126 getOperationAction(ISD::SIGN_EXTEND_INREG, ExtVT) == Legal) in SimplifyDemandedBits()
2130 TLO.DAG.getValueType(ExtVT))); in SimplifyDemandedBits()
9808 EVT ExtVT = VT.getIntegerVT(*DAG.getContext(), 2 * BW); in expandAVG() local
9809 if (isTypeLegal(ExtVT) && isTruncateFree(ExtVT, VT)) { in expandAVG()
9810 LHS = DAG.getNode(ExtOpc, dl, ExtVT, LHS); in expandAVG()
9811 RHS = DAG.getNode(ExtOpc, dl, ExtVT, RHS); in expandAVG()
9812 SDValue Avg = DAG.getNode(ISD::ADD, dl, ExtVT, LHS, RHS); in expandAVG()
9814 Avg = DAG.getNode(ISD::ADD, dl, ExtVT, Avg, in expandAVG()
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H A DLegalizeIntegerTypes.cpp1732 EVT ExtVT = EVT::getVectorVT(*DAG.getContext(), NVT.getVectorElementType(), in PromoteIntRes_TRUNCATE() local
1734 SDValue WideExt = DAG.getNode(ISD::ZERO_EXTEND, dl, ExtVT, WideTrunc); in PromoteIntRes_TRUNCATE()
5878 EVT ExtVT = N->getMemoryVT(); in ExpandIntOp_STORE() local
5879 unsigned EBytes = ExtVT.getStoreSize(); in ExpandIntOp_STORE()
5883 ExtVT.getSizeInBits() - ExcessBits); in ExpandIntOp_STORE()
6015 EVT ExtVT = NOutVT.changeVectorElementType(PromEltVT); in PromoteIntRes_EXTRACT_SUBVECTOR() local
6016 SDValue Ext = DAG.getNode(ISD::EXTRACT_SUBVECTOR, SDLoc(N), ExtVT, Ops); in PromoteIntRes_EXTRACT_SUBVECTOR()
H A DLegalizeVectorTypes.cpp498 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType(); in ScalarizeVecRes_InregOp() local
501 LHS, DAG.getValueType(ExtVT)); in ScalarizeVecRes_InregOp()
5707 EVT ExtVT = EVT::getVectorVT(*DAG.getContext(), in WidenVecRes_InregOp() local
5713 WidenVT, WidenLHS, DAG.getValueType(ExtVT)); in WidenVecRes_InregOp()
6422 EVT ExtVT = EVT::getVectorVT(Ctx, ToMaskVT.getVectorElementType(), in convertMask() local
6424 Mask = DAG.getNode(ISD::SIGN_EXTEND, SDLoc(Mask), ExtVT, Mask); in convertMask()
H A DSelectionDAG.cpp4901 EVT ExtVT = Ext.getValueType(); in ComputeNumSignBits() local
4905 ExtVT.getScalarSizeInBits() - ExtendeeVT.getScalarSizeInBits(); in ComputeNumSignBits()
13032 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType(); in UnrollVectorOp() local
13035 getValueType(ExtVT))); in UnrollVectorOp()
H A DSelectionDAGBuilder.cpp6482 EVT ExtVT = TLI.getVectorIdxTy(Layout); in visitVectorExtractLastActive() local
6483 SDValue Idx = DAG.getNode(ISD::VECTOR_FIND_LAST_ACTIVE, sdl, ExtVT, Mask); in visitVectorExtractLastActive()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp12424 MVT ExtVT = MVT::getVectorVT(MVT::getIntegerVT(EltBits * Scale), in lowerShuffleAsSpecificExtension() local
12428 InputV = getEXTEND_VECTOR_INREG(ExtOpc, DL, ExtVT, InputV, DAG); in lowerShuffleAsSpecificExtension()
12720 MVT ExtVT = VT; in lowerShuffleAsElementInsertion() local
12765 ExtVT = MVT::getVectorVT(MVT::i32, ExtVT.getSizeInBits() / 32); in lowerShuffleAsElementInsertion()
12775 V2 = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, ExtVT, V2S); in lowerShuffleAsElementInsertion()
12776 V2 = DAG.getBitcast(VT, DAG.getNode(X86ISD::VZEXT_MOVL, DL, ExtVT, V2)); in lowerShuffleAsElementInsertion()
12780 V2 = DAG.getNode(ISD::SCALAR_TO_VECTOR, DL, ExtVT, V2S); in lowerShuffleAsElementInsertion()
12791 assert(VT == ExtVT && "Cannot change extended type when non-zeroable!"); in lowerShuffleAsElementInsertion()
12807 return DAG.getNode(MovOpc, DL, ExtVT, V1, V2); in lowerShuffleAsElementInsertion()
12814 V2 = DAG.getNode(X86ISD::VZEXT_MOVL, DL, ExtVT, V2); in lowerShuffleAsElementInsertion()
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H A DX86ISelLowering.h1149 EVT ExtVT) const override;
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUCallLowering.cpp331 EVT ExtVT = TLI.getTypeForExtReturn(Ctx, VT, in lowerReturnVal() local
333 if (ExtVT != VT) { in lowerReturnVal()
334 RetInfo.Ty = ExtVT.getTypeForEVT(Ctx); in lowerReturnVal()
H A DAMDGPUISelLowering.h221 bool shouldReduceLoadWidth(SDNode *Load, ISD::LoadExtType ExtType, EVT ExtVT,
H A DAMDGPUISelLowering.cpp3984 EVT ExtVT = cast<VTSDNode>(N1)->getVT(); in performAssertSZExtCombine() local
3989 if (SrcVT.bitsGE(ExtVT)) { in performAssertSZExtCombine()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Instrumentation/
H A DNumericalStabilitySanitizer.cpp1931 Type *ExtVT = Config.getExtendedFPType(BitcastTy); in propagateNonFTStore() local
1933 Builder.CreateFPExt(Builder.CreateBitCast(C, BitcastTy), ExtVT); in propagateNonFTStore()
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp2923 MVT ExtVT; in performVectorExtendToFPCombine() local
2925 ExtVT = MVT::v4i32; in performVectorExtendToFPCombine()
2927 ExtVT = MVT::v2i32; in performVectorExtendToFPCombine()
2933 SDValue Conv = DAG.getNode(Op, SDLoc(N), ExtVT, N->getOperand(0)); in performVectorExtendToFPCombine()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DBasicTTIImpl.h1234 EVT ExtVT = EVT::getEVT(Dst);
1239 TLI->isLoadExtLegal(LType, ExtVT, LoadVT))
H A DTargetLowering.h953 virtual bool preferSextInRegOfTruncate(EVT TruncVT, EVT VT, EVT ExtVT) const { in preferSextInRegOfTruncate() argument
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp4564 MVT ExtVT = in LowerVectorFP_TO_INT() local
4568 SDValue Ext = DAG.getNode(ISD::STRICT_FP_EXTEND, DL, {ExtVT, MVT::Other}, in LowerVectorFP_TO_INT()
4573 SDValue Ext = DAG.getNode(ISD::FP_EXTEND, DL, ExtVT, Op.getOperand(0)); in LowerVectorFP_TO_INT()
6406 EVT ExtVT = ExtVal.getValueType(); in isVectorLoadExtDesirable() local
6407 if (!ExtVT.isScalableVector() && !Subtarget->useSVEForFixedLengthVectors()) in isVectorLoadExtDesirable()
6416 if (!isLoadExtLegalOrCustom(ISD::ZEXTLOAD, ExtVT, Ld->getValueType(0))) { in isVectorLoadExtDesirable()
6419 if (!ExtVT.isScalableVector()) in isVectorLoadExtDesirable()
18244 EVT ExtVT = Extracts[0]->getValueType(0); in performActiveLaneMaskCombine() local
18246 DAG.getNode(ISD::INTRINSIC_WO_CHAIN, DL, {ExtVT, ExtVT}, {ID, Idx, TC}); in performActiveLaneMaskCombine()
18253 auto Elts = DAG.getElementCount(DL, OpVT, ExtVT.getVectorElementCount() * 2); in performActiveLaneMaskCombine()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp8187 EVT ExtVT = VT.getVectorElementType(); in LowerBUILD_VECTOR() local
8188 EVT HVT = EVT::getVectorVT(*DAG.getContext(), ExtVT, NumElts / 2); in LowerBUILD_VECTOR()
9448 EVT ExtVT = ToVT.getHalfNumVectorElementsVT(*DAG.getContext()); in LowerVectorExtend() local
9450 ExtVT = MVT::v8i16; in LowerVectorExtend()
9454 SDValue Ext = DAG.getNode(Opcode, DL, DAG.getVTList(ExtVT, ExtVT), Op); in LowerVectorExtend()
18094 MVT ExtVT, HalfVT; in PerformMinMaxCombine() local
18097 ExtVT = MVT::v4i16; in PerformMinMaxCombine()
18100 ExtVT = MVT::v8i8; in PerformMinMaxCombine()
18111 DAG.getValueType(ExtVT)); in PerformMinMaxCombine()
18855 EVT ExtVT = N->getOperand(0).getValueType().getHalfNumVectorElementsVT( in PerformMVEExtCombine() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp7608 EVT ExtVT = Op.getValueType(); in combineExtract() local
7610 unsigned ExtBytesPerElement = ExtVT.getVectorElementType().getStoreSize(); in combineExtract()
8533 EVT ExtVT = EVT::getVectorVT( in combineINT_TO_FP() local
8537 SDValue ExtOp = DAG.getNode(ExtOpcode, SDLoc(N), ExtVT, Op); in combineINT_TO_FP()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp8797 EVT ExtVT = Src.getValueType(); in LowerINT_TO_FPVector() local
8799 ExtVT = EVT::getVectorVT(*DAG.getContext(), WideVT.getVectorElementType(), in LowerINT_TO_FPVector()
8803 DAG.getValueType(ExtVT)); in LowerINT_TO_FPVector()
15713 EVT ExtVT = EVT::getVectorVT(*DAG.getContext(), in addShuffleForVecExtend() local
15717 DAG.getValueType(ExtVT)); in addShuffleForVecExtend()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp9624 MVT ExtVT = Op.getSimpleValueType(); in lowerFixedLengthVectorExtendToRVV() local
9626 if (!ExtVT.isFixedLengthVector()) in lowerFixedLengthVectorExtendToRVV()
9632 MVT ContainerExtVT = getContainerForFixedLengthVector(ExtVT); in lowerFixedLengthVectorExtendToRVV()
9646 return convertFromScalableVector(ExtVT, Ext, DAG, Subtarget); in lowerFixedLengthVectorExtendToRVV()