Lines Matching refs:ExtVT
749 EVT LoadResultTy, EVT &ExtVT);
6418 EVT LoadResultTy, EVT &ExtVT) { in isAndLoadExtLoad() argument
6424 ExtVT = EVT::getIntegerVT(*DAG.getContext(), ActiveBits); in isAndLoadExtLoad()
6427 if (ExtVT == LoadedVT && in isAndLoadExtLoad()
6429 TLI.isLoadExtLegal(ISD::ZEXTLOAD, LoadResultTy, ExtVT))) { in isAndLoadExtLoad()
6441 if (!LoadedVT.bitsGT(ExtVT) || !ExtVT.isRound()) in isAndLoadExtLoad()
6445 !TLI.isLoadExtLegal(ISD::ZEXTLOAD, LoadResultTy, ExtVT)) in isAndLoadExtLoad()
6448 if (!TLI.shouldReduceLoadWidth(LoadN, ISD::ZEXTLOAD, ExtVT)) in isAndLoadExtLoad()
6567 EVT ExtVT; in SearchForAndLoads() local
6568 if (isAndLoadExtLoad(Mask, Load, Load->getValueType(0), ExtVT) && in SearchForAndLoads()
6569 isLegalNarrowLdSt(Load, ISD::ZEXTLOAD, ExtVT)) { in SearchForAndLoads()
6573 ExtVT.bitsGE(Load->getMemoryVT())) in SearchForAndLoads()
6577 if (ExtVT.bitsLE(Load->getMemoryVT())) in SearchForAndLoads()
6587 EVT ExtVT = EVT::getIntegerVT(*DAG.getContext(), ActiveBits); in SearchForAndLoads() local
6594 if (ExtVT.bitsGE(VT)) in SearchForAndLoads()
6982 EVT ExtVT = VT; in visitAND() local
6983 if (TLI.isLoadExtLegal(ISD::ZEXTLOAD, ExtVT, LoadVT)) { in visitAND()
6991 ExtVT, DL, MLoad->getChain(), MLoad->getBasePtr(), in visitAND()
7190 EVT ExtVT = Ext->getValueType(0); in visitAND() local
7195 (!LegalOperations || TLI.isOperationLegal(ISD::ZERO_EXTEND, ExtVT))) { in visitAND()
7199 DAG.getNode(ISD::ZERO_EXTEND, DL, ExtVT, Extendee); in visitAND()
11012 EVT ExtVT = cast<VTSDNode>(N0.getOperand(1))->getVT(); in visitABS() local
11013 if (TLI.isTruncateFree(VT, ExtVT) && TLI.isZExtFree(ExtVT, VT) && in visitABS()
11014 TLI.isTypeDesirableForOp(ISD::ABS, ExtVT) && in visitABS()
11015 hasOperation(ISD::ABS, ExtVT)) { in visitABS()
11018 DAG.getNode(ISD::ABS, DL, ExtVT, in visitABS()
11019 DAG.getNode(ISD::TRUNCATE, DL, ExtVT, N0.getOperand(0)))); in visitABS()
13596 EVT ExtVT = cast<VTSDNode>(N0->getOperand(1))->getVT(); in visitSIGN_EXTEND() local
13597 if ((N00.getOpcode() == ISD::TRUNCATE || TLI.isTruncateFree(N00, ExtVT)) && in visitSIGN_EXTEND()
13598 (!LegalTypes || TLI.isTypeLegal(ExtVT))) { in visitSIGN_EXTEND()
13599 SDValue T = DAG.getNode(ISD::TRUNCATE, DL, ExtVT, N00); in visitSIGN_EXTEND()
14013 EVT ExtVT; in visitZERO_EXTEND() local
14014 if (isAndLoadExtLoad(AndC, LN00, LoadResultTy, ExtVT)) in visitZERO_EXTEND()
14430 EVT ExtVT = VT; in reduceLoadWidth() local
14449 ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT(); in reduceLoadWidth()
14469 ExtVT = EVT::getIntegerVT(*DAG.getContext(), MemoryWidth - ShAmt); in reduceLoadWidth()
14495 ExtVT = EVT::getIntegerVT(*DAG.getContext(), ActiveBits); in reduceLoadWidth()
14539 if (ExtVT.getScalarSizeInBits() > MemoryWidth - ShAmt) { in reduceLoadWidth()
14545 ExtVT = EVT::getIntegerVT(*DAG.getContext(), MemoryWidth - ShAmt); in reduceLoadWidth()
14559 if ((ExtVT.getScalarSizeInBits() > MaskedVT.getScalarSizeInBits()) && in reduceLoadWidth()
14561 ExtVT = MaskedVT; in reduceLoadWidth()
14568 if (((Offset + ActiveBits) <= ExtVT.getScalarSizeInBits()) && in reduceLoadWidth()
14570 ExtVT = MaskedVT; in reduceLoadWidth()
14587 ExtVT == VT && TLI.isNarrowingProfitable(N0.getValueType(), VT)) { in reduceLoadWidth()
14602 !isLegalNarrowLdSt(LN0, ExtType, ExtVT, ShAmt)) in reduceLoadWidth()
14608 unsigned EVTStoreBits = ExtVT.getStoreSizeInBits().getFixedValue(); in reduceLoadWidth()
14634 LN0->getPointerInfo().getWithOffset(PtrOff), ExtVT, in reduceLoadWidth()
14674 EVT ExtVT = cast<VTSDNode>(N1)->getVT(); in visitSIGN_EXTEND_INREG() local
14676 unsigned ExtVTBits = ExtVT.getScalarSizeInBits(); in visitSIGN_EXTEND_INREG()
14692 ExtVT.bitsLT(cast<VTSDNode>(N0.getOperand(1))->getVT())) in visitSIGN_EXTEND_INREG()
14738 return DAG.getZeroExtendInReg(N0, SDLoc(N), ExtVT); in visitSIGN_EXTEND_INREG()
14771 ExtVT == cast<LoadSDNode>(N0)->getMemoryVT() && in visitSIGN_EXTEND_INREG()
14774 TLI.isLoadExtLegal(ISD::SEXTLOAD, VT, ExtVT))) { in visitSIGN_EXTEND_INREG()
14778 LN0->getBasePtr(), ExtVT, in visitSIGN_EXTEND_INREG()
14789 ExtVT == cast<LoadSDNode>(N0)->getMemoryVT() && in visitSIGN_EXTEND_INREG()
14791 TLI.isLoadExtLegal(ISD::SEXTLOAD, VT, ExtVT))) { in visitSIGN_EXTEND_INREG()
14795 LN0->getBasePtr(), ExtVT, in visitSIGN_EXTEND_INREG()
14805 if (ExtVT == Ld->getMemoryVT() && N0.hasOneUse() && in visitSIGN_EXTEND_INREG()
14807 TLI.isLoadExtLegal(ISD::SEXTLOAD, VT, ExtVT)) { in visitSIGN_EXTEND_INREG()
14810 Ld->getMask(), Ld->getPassThru(), ExtVT, Ld->getMemOperand(), in visitSIGN_EXTEND_INREG()
14821 ExtVT == GN0->getMemoryVT() && in visitSIGN_EXTEND_INREG()
14827 DAG.getVTList(VT, MVT::Other), ExtVT, SDLoc(N), Ops, in visitSIGN_EXTEND_INREG()
14965 EVT ExtVT = cast<VTSDNode>(ExtVal)->getVT(); in visitTRUNCATE() local
14966 if (ExtVT.bitsLT(VT) && TLI.preferSextInRegOfTruncate(VT, SrcVT, ExtVT)) { in visitTRUNCATE()
22764 EVT ExtVT = VecVT.getVectorElementType(); in visitEXTRACT_VECTOR_ELT() local
22765 EVT LVT = ExtVT; in visitEXTRACT_VECTOR_ELT()
22775 if (!BCVT.isVector() || ExtVT.bitsGT(BCVT.getVectorElementType())) in visitEXTRACT_VECTOR_ELT()
22780 ExtVT = BCVT.getVectorElementType(); in visitEXTRACT_VECTOR_ELT()
22805 VecOp.getOperand(0).getValueType() == ExtVT && in visitEXTRACT_VECTOR_ELT()
23966 EVT ExtVT = ExtVec.getValueType(); in combineConcatVectorOfExtracts() local
23977 if (ExtVT.getSizeInBits() != VT.getSizeInBits()) in combineConcatVectorOfExtracts()
23981 int NumExtElts = ExtVT.getVectorNumElements(); in combineConcatVectorOfExtracts()