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Searched refs:DstSize (Results 1 – 25 of 36) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64GenRegisterBankInfo.def254 AArch64GenRegisterBankInfo::getFPExtMapping(unsigned DstSize,
270 assert((DstSize == 32 || DstSize == 64) && "Unexpected half extension");
271 if (DstSize == 32)
277 assert(DstSize == 64 && "Unexpected float extension");
280 assert((SrcSize == 64 || DstSize == 128) && "Unexpected vector extension");
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp179 MachineInstr *tryAdvSIMDModImm8(Register Dst, unsigned DstSize, APInt Bits,
182 MachineInstr *tryAdvSIMDModImm16(Register Dst, unsigned DstSize, APInt Bits,
185 MachineInstr *tryAdvSIMDModImm32(Register Dst, unsigned DstSize, APInt Bits,
187 MachineInstr *tryAdvSIMDModImm64(Register Dst, unsigned DstSize, APInt Bits,
189 MachineInstr *tryAdvSIMDModImm321s(Register Dst, unsigned DstSize, APInt Bits,
191 MachineInstr *tryAdvSIMDModImmFP(Register Dst, unsigned DstSize, APInt Bits,
963 TypeSize DstSize = RBI.getSizeInBits(DstReg, MRI, TRI); in getRegClassesForCopy() local
975 (DstSize == TypeSize::getFixed(1) && SrcSize == TypeSize::getFixed(1))) in getRegClassesForCopy()
976 SrcSize = DstSize = TypeSize::getFixed(32); in getRegClassesForCopy()
979 getMinClassForRegBank(DstRegBank, DstSize, true)}; in getRegClassesForCopy()
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H A DAArch64RegisterBankInfo.h98 getFPExtMapping(unsigned DstSize, unsigned SrcSize);
H A DAArch64PostLegalizerCombiner.cpp84 unsigned DstSize = DstTy.getSizeInBits(); in matchExtractVecEltPairwiseAdd() local
85 if (DstSize != 16 && DstSize != 32 && DstSize != 64) in matchExtractVecEltPairwiseAdd()
H A DAArch64RegisterBankInfo.cpp190 #define CHECK_VALUEMAP_FPEXT(DstSize, SrcSize) \ in AArch64RegisterBankInfo() argument
192 unsigned PartialMapDstIdx = PMI_FPR##DstSize - PMI_Min; \ in AArch64RegisterBankInfo()
196 const ValueMapping *Map = getFPExtMapping(DstSize, SrcSize); \ in AArch64RegisterBankInfo()
200 Map[0].NumBreakDowns == 1 && "FPR" #DstSize \ in AArch64RegisterBankInfo()
H A DAArch64PreLegalizerCombiner.cpp52 const unsigned DstSize = MRI.getType(DstReg).getSizeInBits(); in matchFConstantToConstant() local
53 if (DstSize != 32 && DstSize != 64) in matchFConstantToConstant()
H A DAArch64LegalizerInfo.cpp737 unsigned DstSize = Query.Types[0].getSizeInBits(); in AArch64LegalizerInfo() local
743 if (DstSize < 8 || DstSize >= 128 || !isPowerOf2_32(DstSize)) in AArch64LegalizerInfo()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPURegisterBankInfo.cpp2809 unsigned DstSize = DstTy.getSizeInBits(); in applyMappingImpl() local
2811 const bool UseSel64 = DstSize > 32 && in applyMappingImpl()
2823 if (DstSize > 32) { in applyMappingImpl()
2826 } else if (DstSize < 32) { in applyMappingImpl()
4174 unsigned DstSize = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping() local
4177 OpdsMapping[0] = AMDGPU::getValueMapping(BankID, DstSize); in getInstrMapping()
4185 unsigned DstSize = getSizeInBits(MI.getOperand(0).getReg(), MRI, *TRI); in getInstrMapping() local
4187 OpdsMapping[0] = AMDGPU::getValueMapping(BankID, DstSize); in getInstrMapping()
4196 unsigned DstSize = DstTy.getSizeInBits(); in getInstrMapping() local
4202 OpdsMapping[0] = AMDGPU::getValueMapping(DstBankID, DstSize); in getInstrMapping()
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H A DAMDGPUInstructionSelector.cpp598 unsigned DstSize = DstTy.getSizeInBits(); in selectG_EXTRACT() local
602 if (Offset % 32 != 0 || DstSize > 128) in selectG_EXTRACT()
607 if (DstSize == 16) in selectG_EXTRACT()
608 DstSize = 32; in selectG_EXTRACT()
621 DstSize / 32); in selectG_EXTRACT()
648 const unsigned DstSize = DstTy.getSizeInBits(); in selectG_MERGE_VALUES() local
650 TRI.getRegClassForSizeOnBank(DstSize, *DstBank); in selectG_MERGE_VALUES()
686 const unsigned DstSize = DstTy.getSizeInBits(); in selectG_UNMERGE_VALUES() local
699 ArrayRef<int16_t> SubRegs = TRI.getRegSplitParts(SrcRC, DstSize / 8); in selectG_UNMERGE_VALUES()
892 unsigned DstSize = MRI->getType(DstReg).getSizeInBits(); in selectG_INSERT() local
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DInlineAsmLowering.cpp194 unsigned DstSize = TRI->getRegSizeInBits(Dst, *MRI); in buildAnyextOrCopy() local
196 if (DstSize < SrcSize) { in buildAnyextOrCopy()
202 if (DstSize > SrcSize) { in buildAnyextOrCopy()
208 Src = MIRBuilder.buildAnyExt(LLT::scalar(DstSize), Src).getReg(0); in buildAnyextOrCopy()
H A DUtils.cpp967 const unsigned DstSize = DstTy.getScalarSizeInBits(); in ConstantFoldCastOp() local
971 return Val->sext(DstSize); in ConstantFoldCastOp()
975 return Val->zext(DstSize); in ConstantFoldCastOp()
H A DCallLowering.cpp619 const unsigned DstSize = DstTy.getSizeInBits(); in buildCopyToRegs() local
628 CoveringSize = alignTo(SrcSize, DstSize); in buildCopyToRegs()
H A DLegalizerHelper.cpp2154 const int DstSize = DstTy.getSizeInBits(); in widenScalarMergeValues() local
2157 const int NumMerge = (DstSize + WideSize - 1) / WideSize; in widenScalarMergeValues()
2163 if (WideSize >= DstSize) { in widenScalarMergeValues()
2184 if (WideSize > DstSize) in widenScalarMergeValues()
2303 unsigned DstSize = DstTy.getSizeInBits(); in widenScalarUnmergeValues() local
2307 auto ShiftAmt = MIRBuilder.buildConstant(SrcTy, DstSize * I); in widenScalarUnmergeValues()
8425 const unsigned DstSize = DstTy.getSizeInBits(); in lowerUnmergeValues() local
8426 unsigned Offset = DstSize; in lowerUnmergeValues()
8427 for (unsigned I = 1; I != NumDst; ++I, Offset += DstSize) { in lowerUnmergeValues()
8721 unsigned DstSize = DstTy.getSizeInBits(); in lowerExtract() local
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCRegisterBankInfo.cpp203 unsigned DstSize = DstTy.getSizeInBits(); in getInstrMapping() local
214 MappingID, Cost, getCopyMapping(DstRB.getID(), SrcRB.getID(), DstSize), in getInstrMapping()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DMachineVerifier.cpp1448 unsigned DstSize = DstTy.getScalarSizeInBits(); in verifyPreISelGenericInstruction() local
1452 if (DstSize <= SrcSize) in verifyPreISelGenericInstruction()
1460 if (DstSize >= SrcSize) in verifyPreISelGenericInstruction()
1652 unsigned DstSize = MRI->getType(MI->getOperand(0).getReg()).getSizeInBits(); in verifyPreISelGenericInstruction() local
1654 if (SrcSize == DstSize) in verifyPreISelGenericInstruction()
1657 if (DstSize + OffsetOp.getImm() > SrcSize) in verifyPreISelGenericInstruction()
1674 unsigned DstSize = MRI->getType(MI->getOperand(0).getReg()).getSizeInBits(); in verifyPreISelGenericInstruction() local
1677 if (DstSize <= SrcSize) in verifyPreISelGenericInstruction()
1680 if (SrcSize + OffsetOp.getImm() > DstSize) in verifyPreISelGenericInstruction()
2380 TypeSize DstSize = TRI->getRegSizeInBits(DstReg, *MRI); in visitMachineInstrBefore() local
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/freebsd/contrib/llvm-project/llvm/lib/Linker/
H A DLinkModules.cpp195 uint64_t DstSize = DstDL.getTypeAllocSize(DstGV->getValueType()); in computeResultingSelectionKind() local
203 From = SrcSize > DstSize ? LinkFrom::Src : LinkFrom::Dst; in computeResultingSelectionKind()
205 if (SrcSize != DstSize) in computeResultingSelectionKind()
/freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DTargetTransformInfoImpl.h735 unsigned DstSize = Dst->getScalarSizeInBits(); in getCastInstrCost() local
736 if (DL.isLegalInteger(DstSize) && in getCastInstrCost()
737 DstSize >= DL.getPointerTypeSizeInBits(Src)) in getCastInstrCost()
749 TypeSize DstSize = DL.getTypeSizeInBits(Dst); in getCastInstrCost() local
750 if (!DstSize.isScalable() && DL.isLegalInteger(DstSize.getFixedValue())) in getCastInstrCost()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DLegalizationArtifactCombiner.h290 const unsigned DstSize = DstTy.getSizeInBits(); in tryCombineTrunc() local
295 if (DstSize < MergeSrcSize) { in tryCombineTrunc()
306 } else if (DstSize == MergeSrcSize) { in tryCombineTrunc()
313 } else if (DstSize % MergeSrcSize == 0) { in tryCombineTrunc()
324 const unsigned NumSrcs = DstSize / MergeSrcSize; in tryCombineTrunc()
/freebsd/contrib/llvm-project/clang/lib/CodeGen/
H A DCGCall.cpp1235 uint64_t DstSize, in EnterStructPointerForCoercedAccess() argument
1248 if (FirstEltSize < DstSize && in EnterStructPointerForCoercedAccess()
1258 return EnterStructPointerForCoercedAccess(SrcPtr, SrcSTy, DstSize, CGF); in EnterStructPointerForCoercedAccess()
1294 uint64_t DstSize = DL.getTypeSizeInBits(DestIntTy); in CoerceIntOrPtrToIntOrPtr() local
1296 if (SrcSize > DstSize) { in CoerceIntOrPtrToIntOrPtr()
1297 Val = CGF.Builder.CreateLShr(Val, SrcSize - DstSize, "coerce.highbits"); in CoerceIntOrPtrToIntOrPtr()
1301 Val = CGF.Builder.CreateShl(Val, DstSize - SrcSize, "coerce.highbits"); in CoerceIntOrPtrToIntOrPtr()
1329 llvm::TypeSize DstSize = CGF.CGM.getDataLayout().getTypeAllocSize(Ty); in CreateCoercedLoad() local
1333 DstSize.getFixedValue(), CGF); in CreateCoercedLoad()
1348 if (!SrcSize.isScalable() && !DstSize.isScalable() && in CreateCoercedLoad()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp1242 unsigned DstSize = IsGather4 ? 4 : std::max(llvm::popcount(DMask), 1); in convertMIMGInst() local
1246 DstSize = (DstSize + 1) / 2; in convertMIMGInst()
1250 DstSize += 1; in convertMIMGInst()
1252 if (DstSize == Info->VDataDwords && AddrSize == Info->VAddrDwords) in convertMIMGInst()
1256 AMDGPU::getMIMGOpcode(Info->BaseOpcode, Info->MIMGEncoding, DstSize, AddrSize); in convertMIMGInst()
1262 if (DstSize != Info->VDataDwords) { in convertMIMGInst()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstructionSelector.cpp
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86InstructionSelector.cpp284 const unsigned DstSize = RBI.getSizeInBits(DstReg, MRI, TRI); in selectCopy() local
294 if (DstSize > SrcSize && SrcRegBank.getID() == X86::GPRRegBankID && in selectCopy()
320 assert((DstSize == SrcSize || in selectCopy()
324 DstSize <= RBI.getSizeInBits(SrcReg, MRI, TRI))) && in selectCopy()
331 DstRegBank.getID() == X86::GPRRegBankID && SrcSize > DstSize && in selectCopy()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/InstCombine/
H A DInstCombineCasts.cpp1257 unsigned DstSize = DestTy->getScalarSizeInBits(); in visitZExt() local
1262 if (SrcSize < DstSize) { in visitZExt()
1269 if (SrcSize == DstSize) { in visitZExt()
1274 if (SrcSize > DstSize) { in visitZExt()
1276 APInt AndValue(APInt::getLowBitsSet(DstSize, MidSize)); in visitZExt()
/freebsd/contrib/llvm-project/llvm/lib/IR/
H A DInstructions.cpp2954 unsigned DstSize = DstTy->getScalarSizeInBits(); in isEliminableCastPair() local
2957 if (SrcSize < DstSize) in isEliminableCastPair()
2959 if (SrcSize > DstSize) in isEliminableCastPair()
2972 unsigned DstSize = DstTy->getScalarSizeInBits(); in isEliminableCastPair() local
2973 if (SrcSize <= PtrSize && SrcSize == DstSize) in isEliminableCastPair()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DBasicTTIImpl.h1200 TypeSize DstSize = DstLT.second.getSizeInBits();
1216 SrcSize == DstSize)
1272 if (SrcLT.first == DstLT.first && SrcSize == DstSize) {

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