Searched refs:DispatchWidth (Results 1 – 10 of 10) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/MCA/Stages/ |
| H A D | DispatchStage.cpp | 32 : DispatchWidth(MaxDispatchWidth), AvailableEntries(MaxDispatchWidth), in DispatchStage()
34 if (!DispatchWidth) in DispatchStage()
35 DispatchWidth = Subtarget.getSchedModel().IssueWidth; in DispatchStage()
82 if (NumMicroOps > DispatchWidth) { in dispatch()
83 assert(AvailableEntries == DispatchWidth); in dispatch()
85 CarryOver = NumMicroOps - DispatchWidth; in dispatch()
130 std::min(DispatchWidth, NumMicroOps)); in dispatch()
138 AvailableEntries = DispatchWidth; in cycleStart()
142 AvailableEntries = CarryOver >= DispatchWidth ? 0 : DispatchWidth - CarryOver; in cycleStart()
143 unsigned DispatchedOpcodes = DispatchWidth - AvailableEntries; in cycleStart()
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| /freebsd/contrib/llvm-project/llvm/tools/llvm-mca/Views/ |
| H A D | SummaryView.cpp | 27 : SM(Model), Source(S), DispatchWidth(Width ? Width : Model.IssueWidth), in SummaryView()
74 TempStream << "\nDispatch Width: " << DV.DispatchWidth; in printView()
91 DV.DispatchWidth = DispatchWidth; in collectData()
95 DV.BlockRThroughput = computeBlockRThroughput(SM, DispatchWidth, NumMicroOps, in collectData()
106 {"DispatchWidth", DV.DispatchWidth}, in toJSON()
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| H A D | SummaryView.h | 42 const unsigned DispatchWidth;
53 unsigned DispatchWidth;
43 const unsigned DispatchWidth; global() variable
54 unsigned DispatchWidth; global() member
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MCA/ |
| H A D | Context.h | 38 DispatchWidth(DW), RegisterFileSize(RFS), LoadQueueSize(LQS), in MicroOpQueueSize()
43 unsigned DispatchWidth; member
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| H A D | Support.h | 107 /// - NumMicroOps / DispatchWidth
109 double computeBlockRThroughput(const MCSchedModel &SM, unsigned DispatchWidth,
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| /freebsd/contrib/llvm-project/llvm/lib/MCA/ |
| H A D | Support.cpp | 83 double computeBlockRThroughput(const MCSchedModel &SM, unsigned DispatchWidth, in computeBlockRThroughput() argument
87 // throughput. That is because the DispatchWidth is an upper bound on the in computeBlockRThroughput()
89 double Max = static_cast<double>(NumMicroOps) / DispatchWidth; in computeBlockRThroughput()
105 // - (NumMicroOps / DispatchWidth) in computeBlockRThroughput()
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| H A D | Context.cpp | 49 std::make_unique<DispatchStage>(STI, MRI, Opts.DispatchWidth, *RCU, *PRF); in createDefaultPipeline()
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| /freebsd/contrib/llvm-project/llvm/tools/llvm-mca/ |
| H A D | PipelinePrinter.cpp | 68 if (PO.DispatchWidth) in getJSONSimulationParameters()
69 SimParameters.try_emplace("-dispatch", PO.DispatchWidth); in getJSONSimulationParameters()
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| H A D | llvm-mca.cpp | 118 DispatchWidth("dispatch", cl::desc("Override the processor dispatch width"), variable
581 mca::PipelineOptions PO(MicroOpQueue, DecoderThroughput, DispatchWidth, in main()
745 std::make_unique<mca::SummaryView>(SM, Insts, DispatchWidth)); in main()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MCA/Stages/ |
| H A D | DispatchStage.h | 50 unsigned DispatchWidth; variable
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