xref: /freebsd/contrib/llvm-project/llvm/lib/MCA/Support.cpp (revision 5f757f3ff9144b609b3c433dfd370cc6bdc191ad)
10b57cec5SDimitry Andric //===--------------------- Support.cpp --------------------------*- C++ -*-===//
20b57cec5SDimitry Andric //
30b57cec5SDimitry Andric // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
40b57cec5SDimitry Andric // See https://llvm.org/LICENSE.txt for license information.
50b57cec5SDimitry Andric // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
60b57cec5SDimitry Andric //
70b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
80b57cec5SDimitry Andric /// \file
90b57cec5SDimitry Andric ///
100b57cec5SDimitry Andric /// This file implements a few helper functions used by various pipeline
110b57cec5SDimitry Andric /// components.
120b57cec5SDimitry Andric ///
130b57cec5SDimitry Andric //===----------------------------------------------------------------------===//
140b57cec5SDimitry Andric 
150b57cec5SDimitry Andric #include "llvm/MCA/Support.h"
160b57cec5SDimitry Andric #include "llvm/MC/MCSchedule.h"
17bdd1243dSDimitry Andric #include <numeric>
180b57cec5SDimitry Andric 
190b57cec5SDimitry Andric namespace llvm {
200b57cec5SDimitry Andric namespace mca {
210b57cec5SDimitry Andric 
220b57cec5SDimitry Andric #define DEBUG_TYPE "llvm-mca"
230b57cec5SDimitry Andric 
24*5f757f3fSDimitry Andric ReleaseAtCycles &ReleaseAtCycles::operator+=(const ReleaseAtCycles &RHS) {
250b57cec5SDimitry Andric   if (Denominator == RHS.Denominator)
260b57cec5SDimitry Andric     Numerator += RHS.Numerator;
270b57cec5SDimitry Andric   else {
280b57cec5SDimitry Andric     // Create a common denominator for LHS and RHS by calculating the least
290b57cec5SDimitry Andric     // common multiple from the GCD.
30bdd1243dSDimitry Andric     unsigned GCD = std::gcd(Denominator, RHS.Denominator);
310b57cec5SDimitry Andric     unsigned LCM = (Denominator * RHS.Denominator) / GCD;
320b57cec5SDimitry Andric     unsigned LHSNumerator = Numerator * (LCM / Denominator);
330b57cec5SDimitry Andric     unsigned RHSNumerator = RHS.Numerator * (LCM / RHS.Denominator);
340b57cec5SDimitry Andric     Numerator = LHSNumerator + RHSNumerator;
350b57cec5SDimitry Andric     Denominator = LCM;
360b57cec5SDimitry Andric   }
370b57cec5SDimitry Andric   return *this;
380b57cec5SDimitry Andric }
390b57cec5SDimitry Andric 
400b57cec5SDimitry Andric void computeProcResourceMasks(const MCSchedModel &SM,
410b57cec5SDimitry Andric                               MutableArrayRef<uint64_t> Masks) {
420b57cec5SDimitry Andric   unsigned ProcResourceID = 0;
430b57cec5SDimitry Andric 
440b57cec5SDimitry Andric   assert(Masks.size() == SM.getNumProcResourceKinds() &&
450b57cec5SDimitry Andric          "Invalid number of elements");
460b57cec5SDimitry Andric   // Resource at index 0 is the 'InvalidUnit'. Set an invalid mask for it.
470b57cec5SDimitry Andric   Masks[0] = 0;
480b57cec5SDimitry Andric 
490b57cec5SDimitry Andric   // Create a unique bitmask for every processor resource unit.
500b57cec5SDimitry Andric   for (unsigned I = 1, E = SM.getNumProcResourceKinds(); I < E; ++I) {
510b57cec5SDimitry Andric     const MCProcResourceDesc &Desc = *SM.getProcResource(I);
520b57cec5SDimitry Andric     if (Desc.SubUnitsIdxBegin)
530b57cec5SDimitry Andric       continue;
540b57cec5SDimitry Andric     Masks[I] = 1ULL << ProcResourceID;
550b57cec5SDimitry Andric     ProcResourceID++;
560b57cec5SDimitry Andric   }
570b57cec5SDimitry Andric 
580b57cec5SDimitry Andric   // Create a unique bitmask for every processor resource group.
590b57cec5SDimitry Andric   for (unsigned I = 1, E = SM.getNumProcResourceKinds(); I < E; ++I) {
600b57cec5SDimitry Andric     const MCProcResourceDesc &Desc = *SM.getProcResource(I);
610b57cec5SDimitry Andric     if (!Desc.SubUnitsIdxBegin)
620b57cec5SDimitry Andric       continue;
630b57cec5SDimitry Andric     Masks[I] = 1ULL << ProcResourceID;
640b57cec5SDimitry Andric     for (unsigned U = 0; U < Desc.NumUnits; ++U) {
650b57cec5SDimitry Andric       uint64_t OtherMask = Masks[Desc.SubUnitsIdxBegin[U]];
660b57cec5SDimitry Andric       Masks[I] |= OtherMask;
670b57cec5SDimitry Andric     }
680b57cec5SDimitry Andric     ProcResourceID++;
690b57cec5SDimitry Andric   }
700b57cec5SDimitry Andric 
710b57cec5SDimitry Andric #ifndef NDEBUG
720b57cec5SDimitry Andric   LLVM_DEBUG(dbgs() << "\nProcessor resource masks:"
730b57cec5SDimitry Andric                     << "\n");
740b57cec5SDimitry Andric   for (unsigned I = 0, E = SM.getNumProcResourceKinds(); I < E; ++I) {
750b57cec5SDimitry Andric     const MCProcResourceDesc &Desc = *SM.getProcResource(I);
760b57cec5SDimitry Andric     LLVM_DEBUG(dbgs() << '[' << format_decimal(I,2) << "] " << " - "
770b57cec5SDimitry Andric                       << format_hex(Masks[I],16) << " - "
780b57cec5SDimitry Andric                       << Desc.Name << '\n');
790b57cec5SDimitry Andric   }
800b57cec5SDimitry Andric #endif
810b57cec5SDimitry Andric }
820b57cec5SDimitry Andric 
830b57cec5SDimitry Andric double computeBlockRThroughput(const MCSchedModel &SM, unsigned DispatchWidth,
840b57cec5SDimitry Andric                                unsigned NumMicroOps,
850b57cec5SDimitry Andric                                ArrayRef<unsigned> ProcResourceUsage) {
860b57cec5SDimitry Andric   // The block throughput is bounded from above by the hardware dispatch
870b57cec5SDimitry Andric   // throughput. That is because the DispatchWidth is an upper bound on the
880b57cec5SDimitry Andric   // number of opcodes that can be part of a single dispatch group.
890b57cec5SDimitry Andric   double Max = static_cast<double>(NumMicroOps) / DispatchWidth;
900b57cec5SDimitry Andric 
910b57cec5SDimitry Andric   // The block throughput is also limited by the amount of hardware parallelism.
920b57cec5SDimitry Andric   // The number of available resource units affects the resource pressure
930b57cec5SDimitry Andric   // distribution, as well as how many blocks can be executed every cycle.
940b57cec5SDimitry Andric   for (unsigned I = 0, E = SM.getNumProcResourceKinds(); I < E; ++I) {
95*5f757f3fSDimitry Andric     unsigned ReleaseAtCycles = ProcResourceUsage[I];
96*5f757f3fSDimitry Andric     if (!ReleaseAtCycles)
970b57cec5SDimitry Andric       continue;
980b57cec5SDimitry Andric 
990b57cec5SDimitry Andric     const MCProcResourceDesc &MCDesc = *SM.getProcResource(I);
100*5f757f3fSDimitry Andric     double Throughput = static_cast<double>(ReleaseAtCycles) / MCDesc.NumUnits;
1010b57cec5SDimitry Andric     Max = std::max(Max, Throughput);
1020b57cec5SDimitry Andric   }
1030b57cec5SDimitry Andric 
1040b57cec5SDimitry Andric   // The block reciprocal throughput is computed as the MAX of:
1050b57cec5SDimitry Andric   //  - (NumMicroOps / DispatchWidth)
106*5f757f3fSDimitry Andric   //  - (NumUnits / ReleaseAtCycles)   for every consumed processor resource.
1070b57cec5SDimitry Andric   return Max;
1080b57cec5SDimitry Andric }
1090b57cec5SDimitry Andric 
1100b57cec5SDimitry Andric } // namespace mca
1110b57cec5SDimitry Andric } // namespace llvm
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