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Searched refs:ConstraintVT (Results 1 – 13 of 13) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DInlineAsmLowering.cpp97 &TRI, RefOpInfo.ConstraintCode, RefOpInfo.ConstraintVT); in getRegistersForValue()
109 if (OpInfo.ConstraintVT != MVT::Other) in getRegistersForValue()
111 TLI.getNumRegisters(MF.getFunction().getContext(), OpInfo.ConstraintVT); in getRegistersForValue()
170 if (const char *Repl = TLI->LowerXConstraint(OpInfo.ConstraintVT)) { in computeConstraintToUse()
266 OpInfo.ConstraintVT = in lowerInlineAsm()
272 OpInfo.ConstraintVT = in lowerInlineAsm()
276 OpInfo.ConstraintVT = in lowerInlineAsm()
283 OpInfo.ConstraintVT = MVT::Other; in lowerInlineAsm()
286 if (OpInfo.ConstraintVT == MVT::i64x8) in lowerInlineAsm()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGBuilder.cpp9520 if (OpInfo.ConstraintVT == MatchingOpInfo.ConstraintVT) in patchMatchingInput()
9528 OpInfo.ConstraintVT); in patchMatchingInput()
9531 MatchingOpInfo.ConstraintVT); in patchMatchingInput()
9532 if ((OpInfo.ConstraintVT.isInteger() != in patchMatchingInput()
9533 MatchingOpInfo.ConstraintVT.isInteger()) || in patchMatchingInput()
9540 MatchingOpInfo.ConstraintVT = OpInfo.ConstraintVT; in patchMatchingInput()
9618 &TRI, RefOpInfo.ConstraintCode, RefOpInfo.ConstraintVT); in getRegistersForValue()
9628 if (OpInfo.ConstraintVT != MVT::Other && RegVT != MVT::Untyped) { in getRegistersForValue()
9637 !TRI.isTypeLegalForClass(*RC, OpInfo.ConstraintVT)) { in getRegistersForValue()
9642 if (RegVT.getSizeInBits() == OpInfo.ConstraintVT.getSizeInBits()) { in getRegistersForValue()
[all …]
H A DFunctionLoweringInfo.cpp197 Op.ConstraintVT); in set()
H A DTargetLowering.cpp5524 const char *TargetLowering::LowerXConstraint(EVT ConstraintVT) const { in LowerXConstraint()
5525 if (ConstraintVT.isInteger()) in LowerXConstraint()
5527 if (ConstraintVT.isFloatingPoint()) in LowerXConstraint()
5706 OpInfo.ConstraintVT = MVT::Other; in ParseConstraints()
5721 OpInfo.ConstraintVT = in ParseConstraints()
5725 OpInfo.ConstraintVT = in ParseConstraints()
5772 OpInfo.ConstraintVT = VT.isSimple() ? VT.getSimpleVT() : MVT::Other; in ParseConstraints()
5801 if (OpInfo.ConstraintVT != Input.ConstraintVT) { in ParseConstraints()
5802 if ((OpInfo.ConstraintVT.isInteger() != in ParseConstraints()
5803 Input.ConstraintVT.isInteger()) || in ParseConstraints()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelLowering.h534 const char *LowerXConstraint(EVT ConstraintVT) const override;
H A DARMISelLowering.cpp20350 const char *ARMTargetLowering::LowerXConstraint(EVT ConstraintVT) const { in LowerXConstraint()
20360 if (ConstraintVT.isFloatingPoint()) in LowerXConstraint()
20362 if (ConstraintVT.isVector() && Subtarget->hasNEON() && in LowerXConstraint()
20363 (ConstraintVT.getSizeInBits() == 64 || in LowerXConstraint()
20364 ConstraintVT.getSizeInBits() == 128)) in LowerXConstraint()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.h1286 const char *LowerXConstraint(EVT ConstraintVT) const override;
H A DX86ISelLowering.cpp58503 LowerXConstraint(EVT ConstraintVT) const { in LowerXConstraint()
58506 if (ConstraintVT.isFloatingPoint()) { in LowerXConstraint()
58511 return TargetLowering::LowerXConstraint(ConstraintVT); in LowerXConstraint()
58522 if (OpInfo.ConstraintVT.isVector() || !OpInfo.ConstraintVT.isInteger() || in LowerAsmOutputForConstraint()
58523 OpInfo.ConstraintVT.getSizeInBits() < 8) in LowerAsmOutputForConstraint()
58535 SDValue Result = DAG.getNode(ISD::ZERO_EXTEND, DL, OpInfo.ConstraintVT, CC); in LowerAsmOutputForConstraint()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUTargetTransformInfo.cpp869 TRI, TC.ConstraintCode, TC.ConstraintVT).second; in isInlineAsmSourceOfDivergence()
H A DSIISelLowering.cpp16427 SIRI, TC.ConstraintCode, TC.ConstraintVT).second; in requiresUniformRegister()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h1275 const char *LowerXConstraint(EVT ConstraintVT) const override;
H A DAArch64ISelLowering.cpp11448 const char *AArch64TargetLowering::LowerXConstraint(EVT ConstraintVT) const { in LowerXConstraint()
11459 if (ConstraintVT.isFloatingPoint()) in LowerXConstraint()
11462 if (ConstraintVT.isVector() && in LowerXConstraint()
11463 (ConstraintVT.getSizeInBits() == 64 || in LowerXConstraint()
11464 ConstraintVT.getSizeInBits() == 128)) in LowerXConstraint()
11569 if (OpInfo.ConstraintVT.isVector() || !OpInfo.ConstraintVT.isInteger() || in LowerAsmOutputForConstraint()
11570 OpInfo.ConstraintVT.getSizeInBits() < 8) in LowerAsmOutputForConstraint()
11585 if (OpInfo.ConstraintVT.getSizeInBits() <= 32) in LowerAsmOutputForConstraint()
11586 Result = DAG.getNode(ISD::TRUNCATE, DL, OpInfo.ConstraintVT, CC); in LowerAsmOutputForConstraint()
11588 Result = DAG.getNode(ISD::ZERO_EXTEND, DL, OpInfo.ConstraintVT, CC); in LowerAsmOutputForConstraint()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetLowering.h4971 MVT ConstraintVT = MVT::Other; member
5055 virtual const char *LowerXConstraint(EVT ConstraintVT) const;