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Searched refs:CRm (Results 1 – 13 of 13) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/
H A DAArch64BaseInfo.cpp158 uint32_t Op0 = 0, Op1 = 0, CRn = 0, CRm = 0, Op2 = 0; in parseGenericRegister() local
163 Ops[4].getAsInteger(10, CRm); in parseGenericRegister()
165 Bits = (Op0 << 14) | (Op1 << 11) | (CRn << 7) | (CRm << 3) | Op2; in parseGenericRegister()
175 uint32_t CRm = (Bits >> 3) & 0xf; in genericRegisterString() local
179 utostr(CRm) + "_" + utostr(Op2); in genericRegisterString()
/freebsd/contrib/llvm-project/clang/lib/Headers/
H A Darm_acle.h779 #define __arm_cdp(coproc, opc1, CRd, CRn, CRm, opc2) \ argument
780 __builtin_arm_cdp(coproc, opc1, CRd, CRn, CRm, opc2)
786 #define __arm_mcr(coproc, opc1, value, CRn, CRm, opc2) \ argument
787 __builtin_arm_mcr(coproc, opc1, value, CRn, CRm, opc2)
788 #define __arm_mrc(coproc, opc1, CRn, CRm, opc2) \ argument
789 __builtin_arm_mrc(coproc, opc1, CRn, CRm, opc2)
797 #define __arm_cdp(coproc, opc1, CRd, CRn, CRm, opc2) \ argument
798 __builtin_arm_cdp(coproc, opc1, CRd, CRn, CRm, opc2)
806 #define __arm_cdp2(coproc, opc1, CRd, CRn, CRm, opc2) \ argument
807 __builtin_arm_cdp2(coproc, opc1, CRd, CRn, CRm, opc2)
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SystemOperands.td586 // op1 CRn CRm op2
605 // op1 CRn CRm op2
648 // op1, CRn, CRm, op2, needsreg
701 // Op0 Op1 CRn CRm Op2
774 // Op0 Op1 CRn CRm Op2
813 // Op0 Op1 CRn CRm Op2
824 // Op0 Op1 CRn CRm Op2
830 // Op0 Op1 CRn CRm Op2
835 // Op0 Op1 CRn CRm Op2
842 // Op0 Op1 CRn CRm Op2
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H A DAArch64InstrFormats.td1672 class TMBaseSystemI<bit L, bits<4> CRm, bits<3> op2, dag oops, dag iops,
1677 let Inst{11-8} = CRm;
1686 class TMSystemI<bits<4> CRm, string asm, list<dag> pattern>
1687 : TMBaseSystemI<0b1, CRm, 0b011,
1695 class RegInputSystemI<bits<4> CRm, bits<3> Op2, string asm,
1699 let Inst{11-8} = CRm;
1704 class TMSystemINoOperand<bits<4> CRm, string asm, list<dag> pattern>
1705 : TMBaseSystemI<0b0, CRm, 0b011, (outs), (ins), asm, "", pattern> {
1720 // Hint instructions that take both a CRm and a 3-bit immediate.
1734 // CRm. op2 differentiates the opcodes.
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H A DAArch64InstrInfo.td1238 [(int_aarch64_dmb (i32 imm32_0_15:$CRm))]>;
1241 [(int_aarch64_dsb (i32 imm32_0_15:$CRm))]>;
1244 [(int_aarch64_isb (i32 imm32_0_15:$CRm))]>;
1247 let CRm = 0b0010;
1253 let CRm{1-0} = 0b11;
1334 let Uses = [X16], Defs = [X16], CRm = 0b0101 in {
1659 let Uses = [X16, X17], Defs = [X17], CRm = 0b0001 in {
1668 let Uses = [LR], Defs = [LR], CRm = 0b0000 in {
1920 let CRm = 0b0100 in {
H A DSMEInstrFormats.td244 // when these fields are also encoded in CRm[3:1].
/freebsd/sys/arm64/include/
H A Dundefined.h56 MRS_GET(CRm)
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstrInfo.td5390 c_imm:$CRd, c_imm:$CRn, c_imm:$CRm, imm0_7:$opc2),
5391 NoItinerary, "cdp", "\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
5393 timm:$CRm, timm:$opc2)]>,
5400 bits<4> CRm;
5402 let Inst{3-0} = CRm;
5414 c_imm:$CRd, c_imm:$CRn, c_imm:$CRm, imm0_7:$opc2),
5415 NoItinerary, "cdp2\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2",
5417 timm:$CRm, timm:$opc2)]>,
5425 bits<4> CRm;
5427 let Inst{3-0} = CRm;
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H A DARMInstrThumb2.td4605 : T2Cop<Op, oops, iops, opc, "\t$cop, $opc1, $Rt, $CRn, $CRm, $opc2",
4615 bits<4> CRm;
4622 let Inst{3-0} = CRm;
4630 : T2Cop<Op, oops, iops, opc, "\t$cop, $opc1, $Rt, $Rt2, $CRm", pattern> {
4639 bits<4> CRm;
4645 let Inst{3-0} = CRm;
4654 c_imm:$CRm, imm0_7:$opc2),
4656 timm:$CRm, timm:$opc2)]>,
4658 def : t2InstAlias<"mcr${p} $cop, $opc1, $Rt, $CRn, $CRm",
4660 c_imm:$CRm, 0, pred:$p)>;
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/freebsd/sys/arm64/arm64/
H A Didentcpu.c2196 u_int CRm; member
2206 .CRm = name##_CRm, \
2390 int CRm, Op2, i, reg; in user_mrs_handler() local
2408 CRm = mrs_CRm(insn); in user_mrs_handler()
2409 if (CRm > 7 || (CRm < 4 && CRm != 0)) in user_mrs_handler()
2416 if (user_regs[i].CRm == CRm && user_regs[i].Op2 == Op2) { in user_mrs_handler()
2425 if (CRm == 0) { in user_mrs_handler()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/
H A DAArch64Disassembler.cpp1607 unsigned CRm = fieldFromInstruction(insn, 8, 4); in DecodeSyspXzrInstruction() local
1615 Inst.addOperand(MCOperand::createImm(CRm)); in DecodeSyspXzrInstruction()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/
H A DARMDisassembler.cpp6195 unsigned CRm = fieldFromInstruction(Val, 0, 4); in DecoderForMRRC2AndMCRR2() local
6231 Inst.addOperand(MCOperand::createImm(CRm)); in DecoderForMRRC2AndMCRR2()
/freebsd/contrib/llvm-project/clang/lib/CodeGen/
H A DCGBuiltin.cpp8698 Value *CRm = EmitScalarExpr(E->getArg(3)); in EmitARMBuiltinExpr() local
8705 return Builder.CreateCall(F, {Coproc, Opc1, Rt, Rt2, CRm}); in EmitARMBuiltinExpr()
8724 Value *CRm = EmitScalarExpr(E->getArg(2)); in EmitARMBuiltinExpr() local
8725 Value *RtAndRt2 = Builder.CreateCall(F, {Coproc, Opc1, CRm}); in EmitARMBuiltinExpr()