1bcf2b954SAndrew Turner /*-
2bcf2b954SAndrew Turner * Copyright (c) 2017 Andrew Turner
3bcf2b954SAndrew Turner * All rights reserved.
4bcf2b954SAndrew Turner *
5bcf2b954SAndrew Turner * This software was developed by SRI International and the University of
6bcf2b954SAndrew Turner * Cambridge Computer Laboratory under DARPA/AFRL contract FA8750-10-C-0237
7bcf2b954SAndrew Turner * ("CTSRD"), as part of the DARPA CRASH research programme.
8bcf2b954SAndrew Turner *
9bcf2b954SAndrew Turner * Redistribution and use in source and binary forms, with or without
10bcf2b954SAndrew Turner * modification, are permitted provided that the following conditions
11bcf2b954SAndrew Turner * are met:
12bcf2b954SAndrew Turner * 1. Redistributions of source code must retain the above copyright
13bcf2b954SAndrew Turner * notice, this list of conditions and the following disclaimer.
14bcf2b954SAndrew Turner * 2. Redistributions in binary form must reproduce the above copyright
15bcf2b954SAndrew Turner * notice, this list of conditions and the following disclaimer in the
16bcf2b954SAndrew Turner * documentation and/or other materials provided with the distribution.
17bcf2b954SAndrew Turner *
18bcf2b954SAndrew Turner * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
19bcf2b954SAndrew Turner * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
20bcf2b954SAndrew Turner * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
21bcf2b954SAndrew Turner * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
22bcf2b954SAndrew Turner * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
23bcf2b954SAndrew Turner * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
24bcf2b954SAndrew Turner * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
25bcf2b954SAndrew Turner * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
26bcf2b954SAndrew Turner * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
27bcf2b954SAndrew Turner * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
28bcf2b954SAndrew Turner * SUCH DAMAGE.
29bcf2b954SAndrew Turner */
30bcf2b954SAndrew Turner
31bcf2b954SAndrew Turner #ifndef _MACHINE__UNDEFINED_H_
32bcf2b954SAndrew Turner #define _MACHINE__UNDEFINED_H_
33bcf2b954SAndrew Turner
34e68508e1SAndrew Turner #ifdef _KERNEL
35e68508e1SAndrew Turner
36bcf2b954SAndrew Turner typedef int (*undef_handler_t)(vm_offset_t, uint32_t, struct trapframe *,
37bcf2b954SAndrew Turner uint32_t);
38bcf2b954SAndrew Turner
39c7637c4dSAndrew Turner static inline int
mrs_Op0(uint32_t insn)40c7637c4dSAndrew Turner mrs_Op0(uint32_t insn)
41c7637c4dSAndrew Turner {
42c7637c4dSAndrew Turner
43c7637c4dSAndrew Turner /* op0 is encoded without the top bit in a mrs instruction */
44c7637c4dSAndrew Turner return (2 | ((insn & MRS_Op0_MASK) >> MRS_Op0_SHIFT));
45c7637c4dSAndrew Turner }
46c7637c4dSAndrew Turner
47c7637c4dSAndrew Turner #define MRS_GET(op) \
48c7637c4dSAndrew Turner static inline int \
49c7637c4dSAndrew Turner mrs_##op(uint32_t insn) \
50c7637c4dSAndrew Turner { \
51c7637c4dSAndrew Turner \
52c7637c4dSAndrew Turner return ((insn & MRS_##op##_MASK) >> MRS_##op##_SHIFT); \
53c7637c4dSAndrew Turner }
54c7637c4dSAndrew Turner MRS_GET(Op1)
55c7637c4dSAndrew Turner MRS_GET(CRn)
56c7637c4dSAndrew Turner MRS_GET(CRm)
57c7637c4dSAndrew Turner MRS_GET(Op2)
58c7637c4dSAndrew Turner
59bcf2b954SAndrew Turner void undef_init(void);
60bcf2b954SAndrew Turner void *install_undef_handler(bool, undef_handler_t);
61bcf2b954SAndrew Turner void remove_undef_handler(void *);
62bcf2b954SAndrew Turner int undef_insn(u_int, struct trapframe *);
63*45e999d9SAndrew Turner
64e68508e1SAndrew Turner #endif /* _KERNEL */
65bcf2b954SAndrew Turner
66bcf2b954SAndrew Turner #endif
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