/freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
H A D | MCInstrAnalysis.h | 138 unsigned CPUID) const { in isZeroIdiom() argument 163 unsigned CPUID) const { in isDependencyBreaking() argument 164 return isZeroIdiom(MI, Mask, CPUID); in isDependencyBreaking() 174 unsigned CPUID) const { in isOptimizableRegisterMove() argument
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H A D | MCSubtargetInfo.h | 223 unsigned CPUID) const { in resolveVariantSchedClass() argument
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/freebsd/contrib/llvm-project/llvm/lib/MC/ |
H A D | MCSchedule.cpp | 77 unsigned CPUID = getProcessorID(); in computeInstrLatency() local 79 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, &MCII, CPUID); in computeInstrLatency() 123 unsigned CPUID = getProcessorID(); in getReciprocalThroughput() local 125 SchedClass = STI.resolveVariantSchedClass(SchedClass, &Inst, &MCII, CPUID); in getReciprocalThroughput()
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/freebsd/lib/libpmc/pmu-events/ |
H A D | README | 108 CPUID,Version,Dir/path/name,Type 124 CPUID: 125 CPUID is an arch-specific char string, that can be used 131 CPUID == 'GenuineIntel-6-2E' (on x86). 132 CPUID == '004b0100' (PVR value in Powerpc)
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/freebsd/crypto/openssl/crypto/ |
H A D | build.info | 62 # CPUID support. We need to add that explicitly in every shared library and 63 # provider module that uses it. ctype.c is included here because the CPUID 72 # We only need to include the CPUID stuff in the legacy provider when it's a 81 # Implementations are now spread across several libraries, so the CPUID define
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/freebsd/contrib/llvm-project/llvm/tools/llvm-mca/Views/ |
H A D | InstructionInfoView.cpp | 127 unsigned CPUID = SM.getProcessorID(); in collectData() local 132 STI.resolveVariantSchedClass(SchedClassID, &Inst, &MCII, CPUID); in collectData()
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/freebsd/crypto/openssl/doc/man3/ |
H A D | OPENSSL_ia32cap.pod | 15 by processor in EDX:ECX register pair after executing CPUID instruction 80 variable" terms. The truth is that it's not copied from CPUID output 87 CPUID with EAX=7 and ECX=0 as input. Following bits are significant:
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/freebsd/sys/amd64/amd64/ |
H A D | apic_vector.S | 230 movl PCPU(CPUID), %eax
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/freebsd/sys/i386/i386/ |
H A D | swtch.S | 74 movl PCPU(CPUID), %esi 164 movl PCPU(CPUID),%esi
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H A D | apic_vector.S | 326 movl PCPU(CPUID), %eax
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/freebsd/contrib/llvm-project/llvm/include/llvm/BinaryFormat/ |
H A D | Minidump.h | 155 support::ulittle32_t CPUID; member
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/freebsd/contrib/llvm-project/llvm/lib/MCA/ |
H A D | InstrBuilder.cpp | 546 unsigned CPUID = SM.getProcessorID(); in getVariantSchedClassID() local 549 STI.resolveVariantSchedClass(SchedClassID, &MCI, &MCII, CPUID); in getVariantSchedClassID()
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/freebsd/contrib/llvm-project/openmp/runtime/src/ |
H A D | z_Windows_NT-586_asm.asm | 90 cpuid ; Query the CPUID for the current processor 650 cpuid ; Query the CPUID for the current processor
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/freebsd/contrib/llvm-project/llvm/lib/ObjectYAML/ |
H A D | MinidumpYAML.cpp | 165 mapRequiredHex(IO, "CPUID", Info.CPUID); in mapping()
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/freebsd/sys/x86/conf/ |
H A D | NOTES | 614 # CPU control pseudo-device. Provides access to MSRs, CPUID info and
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/freebsd/sys/amd64/conf/ |
H A D | NOTES |
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ScheduleAtom.td | 880 def : InstRW<[AtomWrite01_121], (instrs CPUID)>;
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H A D | X86InstrSystem.td | 510 def CPUID : I<0xA2, RawFrm, (outs), (ins), "cpuid", []>, TB;
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H A D | X86SchedBroadwell.td | 1335 def: InstRW<[BWWriteResGroup159], (instrs CPUID)>;
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H A D | X86SchedSkylakeClient.td | 1412 def: InstRW<[SKLWriteResGroup184], (instrs CPUID, RDTSC)>;
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H A D | X86SchedHaswell.td | 1577 def: InstRW<[HWWriteResGroup149], (instrs CPUID, RDTSC)>;
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H A D | X86SchedAlderlakeP.td | 783 def : InstRW<[ADLPWriteResGroup34], (instrs CPUID)>;
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H A D | X86SchedSkylakeServer.td | 2083 def: InstRW<[SKXWriteResGroup207], (instrs CPUID, RDTSC)>;
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H A D | X86SchedIceLake.td | 2100 def: InstRW<[ICXWriteResGroup207], (instrs CPUID, RDTSC)>;
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/freebsd/sys/i386/conf/ |
H A D | NOTES |
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