1*959826caSMatt Macy 2*959826caSMatt MacyThe contents of this directory allow users to specify PMU events in their 3*959826caSMatt MacyCPUs by their symbolic names rather than raw event codes (see example below). 4*959826caSMatt Macy 5*959826caSMatt MacyThe main program in this directory, is the 'jevents', which is built and 6*959826caSMatt Macyexecuted _BEFORE_ the perf binary itself is built. 7*959826caSMatt Macy 8*959826caSMatt MacyThe 'jevents' program tries to locate and process JSON files in the directory 9*959826caSMatt Macytree tools/perf/pmu-events/arch/foo. 10*959826caSMatt Macy 11*959826caSMatt Macy - Regular files with '.json' extension in the name are assumed to be 12*959826caSMatt Macy JSON files, each of which describes a set of PMU events. 13*959826caSMatt Macy 14*959826caSMatt Macy - The CSV file that maps a specific CPU to its set of PMU events is to 15*959826caSMatt Macy be named 'mapfile.csv' (see below for mapfile format). 16*959826caSMatt Macy 17*959826caSMatt Macy - Directories are traversed, but all other files are ignored. 18*959826caSMatt Macy 19*959826caSMatt Macy - To reduce JSON event duplication per architecture, platform JSONs may 20*959826caSMatt Macy use "ArchStdEvent" keyword to dereference an "Architecture standard 21*959826caSMatt Macy events", defined in architecture standard JSONs. 22*959826caSMatt Macy Architecture standard JSONs must be located in the architecture root 23*959826caSMatt Macy folder. Matching is based on the "EventName" field. 24*959826caSMatt Macy 25*959826caSMatt MacyThe PMU events supported by a CPU model are expected to grouped into topics 26*959826caSMatt Macysuch as Pipelining, Cache, Memory, Floating-point etc. All events for a topic 27*959826caSMatt Macyshould be placed in a separate JSON file - where the file name identifies 28*959826caSMatt Macythe topic. Eg: "Floating-point.json". 29*959826caSMatt Macy 30*959826caSMatt MacyAll the topic JSON files for a CPU model/family should be in a separate 31*959826caSMatt Macysub directory. Thus for the Silvermont X86 CPU: 32*959826caSMatt Macy 33*959826caSMatt Macy $ ls tools/perf/pmu-events/arch/x86/Silvermont_core 34*959826caSMatt Macy Cache.json Memory.json Virtual-Memory.json 35*959826caSMatt Macy Frontend.json Pipeline.json 36*959826caSMatt Macy 37*959826caSMatt MacyThe JSONs folder for a CPU model/family may be placed in the root arch 38*959826caSMatt Macyfolder, or may be placed in a vendor sub-folder under the arch folder 39*959826caSMatt Macyfor instances where the arch and vendor are not the same. 40*959826caSMatt Macy 41*959826caSMatt MacyUsing the JSON files and the mapfile, 'jevents' generates the C source file, 42*959826caSMatt Macy'pmu-events.c', which encodes the two sets of tables: 43*959826caSMatt Macy 44*959826caSMatt Macy - Set of 'PMU events tables' for all known CPUs in the architecture, 45*959826caSMatt Macy (one table like the following, per JSON file; table name 'pme_power8' 46*959826caSMatt Macy is derived from JSON file name, 'power8.json'). 47*959826caSMatt Macy 48*959826caSMatt Macy struct pmu_event pme_power8[] = { 49*959826caSMatt Macy 50*959826caSMatt Macy ... 51*959826caSMatt Macy 52*959826caSMatt Macy { 53*959826caSMatt Macy .name = "pm_1plus_ppc_cmpl", 54*959826caSMatt Macy .event = "event=0x100f2", 55*959826caSMatt Macy .desc = "1 or more ppc insts finished,", 56*959826caSMatt Macy }, 57*959826caSMatt Macy 58*959826caSMatt Macy ... 59*959826caSMatt Macy } 60*959826caSMatt Macy 61*959826caSMatt Macy - A 'mapping table' that maps each CPU of the architecture, to its 62*959826caSMatt Macy 'PMU events table' 63*959826caSMatt Macy 64*959826caSMatt Macy struct pmu_events_map pmu_events_map[] = { 65*959826caSMatt Macy { 66*959826caSMatt Macy .cpuid = "004b0000", 67*959826caSMatt Macy .version = "1", 68*959826caSMatt Macy .type = "core", 69*959826caSMatt Macy .table = pme_power8 70*959826caSMatt Macy }, 71*959826caSMatt Macy ... 72*959826caSMatt Macy 73*959826caSMatt Macy }; 74*959826caSMatt Macy 75*959826caSMatt MacyAfter the 'pmu-events.c' is generated, it is compiled and the resulting 76*959826caSMatt Macy'pmu-events.o' is added to 'libperf.a' which is then used to build perf. 77*959826caSMatt Macy 78*959826caSMatt MacyNOTES: 79*959826caSMatt Macy 1. Several CPUs can support same set of events and hence use a common 80*959826caSMatt Macy JSON file. Hence several entries in the pmu_events_map[] could map 81*959826caSMatt Macy to a single 'PMU events table'. 82*959826caSMatt Macy 83*959826caSMatt Macy 2. The 'pmu-events.h' has an extern declaration for the mapping table 84*959826caSMatt Macy and the generated 'pmu-events.c' defines this table. 85*959826caSMatt Macy 86*959826caSMatt Macy 3. _All_ known CPU tables for architecture are included in the perf 87*959826caSMatt Macy binary. 88*959826caSMatt Macy 89*959826caSMatt MacyAt run time, perf determines the actual CPU it is running on, finds the 90*959826caSMatt Macymatching events table and builds aliases for those events. This allows 91*959826caSMatt Macyusers to specify events by their name: 92*959826caSMatt Macy 93*959826caSMatt Macy $ perf stat -e pm_1plus_ppc_cmpl sleep 1 94*959826caSMatt Macy 95*959826caSMatt Macywhere 'pm_1plus_ppc_cmpl' is a Power8 PMU event. 96*959826caSMatt Macy 97*959826caSMatt MacyHowever some errors in processing may cause the perf build to fail. 98*959826caSMatt Macy 99*959826caSMatt MacyMapfile format 100*959826caSMatt Macy=============== 101*959826caSMatt Macy 102*959826caSMatt MacyThe mapfile enables multiple CPU models to share a single set of PMU events. 103*959826caSMatt MacyIt is required even if such mapping is 1:1. 104*959826caSMatt Macy 105*959826caSMatt MacyThe mapfile.csv format is expected to be: 106*959826caSMatt Macy 107*959826caSMatt Macy Header line 108*959826caSMatt Macy CPUID,Version,Dir/path/name,Type 109*959826caSMatt Macy 110*959826caSMatt Macywhere: 111*959826caSMatt Macy 112*959826caSMatt Macy Comma: 113*959826caSMatt Macy is the required field delimiter (i.e other fields cannot 114*959826caSMatt Macy have commas within them). 115*959826caSMatt Macy 116*959826caSMatt Macy Comments: 117*959826caSMatt Macy Lines in which the first character is either '\n' or '#' 118*959826caSMatt Macy are ignored. 119*959826caSMatt Macy 120*959826caSMatt Macy Header line 121*959826caSMatt Macy The header line is the first line in the file, which is 122*959826caSMatt Macy always _IGNORED_. It can empty. 123*959826caSMatt Macy 124*959826caSMatt Macy CPUID: 125*959826caSMatt Macy CPUID is an arch-specific char string, that can be used 126*959826caSMatt Macy to identify CPU (and associate it with a set of PMU events 127*959826caSMatt Macy it supports). Multiple CPUIDS can point to the same 128*959826caSMatt Macy File/path/name.json. 129*959826caSMatt Macy 130*959826caSMatt Macy Example: 131*959826caSMatt Macy CPUID == 'GenuineIntel-6-2E' (on x86). 132*959826caSMatt Macy CPUID == '004b0100' (PVR value in Powerpc) 133*959826caSMatt Macy Version: 134*959826caSMatt Macy is the Version of the mapfile. 135*959826caSMatt Macy 136*959826caSMatt Macy Dir/path/name: 137*959826caSMatt Macy is the pathname to the directory containing the CPU's JSON 138*959826caSMatt Macy files, relative to the directory containing the mapfile.csv 139*959826caSMatt Macy 140*959826caSMatt Macy Type: 141*959826caSMatt Macy indicates whether the events or "core" or "uncore" events. 142*959826caSMatt Macy 143*959826caSMatt Macy 144*959826caSMatt Macy Eg: 145*959826caSMatt Macy 146*959826caSMatt Macy $ grep Silvermont tools/perf/pmu-events/arch/x86/mapfile.csv 147*959826caSMatt Macy GenuineIntel-6-37,V13,Silvermont_core,core 148*959826caSMatt Macy GenuineIntel-6-4D,V13,Silvermont_core,core 149*959826caSMatt Macy GenuineIntel-6-4C,V13,Silvermont_core,core 150*959826caSMatt Macy 151*959826caSMatt Macy i.e the three CPU models use the JSON files (i.e PMU events) listed 152*959826caSMatt Macy in the directory 'tools/perf/pmu-events/arch/x86/Silvermont_core'. 153