| /freebsd/contrib/llvm-project/llvm/lib/Analysis/ |
| H A D | LoopCacheAnalysis.cpp | 160 IndexedReference::hasSpacialReuse(const IndexedReference &Other, unsigned CLS, in hasSpacialReuse() argument
202 bool InSameCacheLine = (Diff->getValue()->getSExtValue() < CLS); in hasSpacialReuse()
273 unsigned CLS) const { in computeRefCost()
292 if (isConsecutive(L, Stride, CLS)) { in computeRefCost()
298 const SCEV *CacheLineSize = SE.getConstant(WiderType, CLS); in computeRefCost()
474 unsigned CLS) const { in isConsecutive()
501 const SCEV *CacheLineSize = SE.getConstant(Stride->getType(), CLS); in isConsecutive()
628 unsigned CLS = TTI.getCacheLineSize(); in populateReferenceGroups() local
665 R->hasSpacialReuse(Representative, CLS, AA); in populateReferenceGroups()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/Analysis/ |
| H A D | LoopCacheAnalysis.h | 78 unsigned CLS, AAResults &AA) const;
97 CacheCostTy computeRefCost(const Loop &L, unsigned CLS) const;
115 bool isConsecutive(const Loop &L, const SCEV *&Stride, unsigned CLS) const;
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZPatterns.td | 19 // in which the first operand has class CLS and which the second operand
56 // Record that INSN performs insertion TYPE into a register of class CLS.
148 // registers in CLS against zero.
156 // on registers of class CLS.
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoP.td | 120 def CLS : Unary_r<0b011000000011, 0b001, "cls">;
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SchedCyclone.td | 152 // CLS,CLZ,RBIT,REV,REV16,REV32
504 // CLS,CLZ,CNT,RBIT,REV16,REV32,REV64,XTN
|
| H A D | AArch64SchedFalkorDetails.td | 922 def : InstRW<[FalkorWr_1VXVY_2cyc], (instregex "^(CLS|CLZ|CNT|RBIT)(v2i32|v4i16|v8i8)$")>;
944 def : InstRW<[FalkorWr_2VXVY_2cyc], (instregex "^(CLS|CLZ|CNT|RBIT)(v4i32|v8i16|v16i8)$")>;
1207 def : InstRW<[FalkorWr_1XYZ_2cyc], (instregex "^(CLS|CLZ|RBIT|REV|REV16|REV32)(W|X)r$")>;
|
| H A D | AArch64SchedTSV110.td | 434 def : InstRW<[TSV110Wr_1cyc_1ALUAB], (instregex "^(CLS|CLZ|RBIT|REV(16|32)?)(W|X)r$")>;
672 def : InstRW<[TSV110Wr_2cyc_1FSU1_1FSU2], (instregex "^(CLS|CLZ|CNT)v")>;
|
| H A D | AArch64SchedAmpere1.td | 987 def : InstRW<[Ampere1Write_1cyc_1B], (instregex "CLS(W|X)")>;
1059 (instregex "^(CLS|CLZ|CNT)v")>;
|
| H A D | AArch64SchedAmpere1B.td | 969 def : InstRW<[Ampere1BWrite_1cyc_1B], (instregex "CLS(W|X)")>;
1066 (instregex "^(CLS|CLZ|CNT)v")>;
|
| H A D | AArch64SchedKryoDetails.td | 495 (instregex "(CLS|CLZ)(W|X)r")>;
501 (instregex "(CLS|CLZ|CNT)(v4i32|v8i16|v16i8)")>;
507 (instregex "(CLS|CLZ|CNT)(v2i32|v4i16|v8i8)")>;
|
| H A D | AArch64SchedThunderX2T99.td | 560 def : InstRW<[THX2T99Write_3Cyc_I1], (instregex "^CLS(W|X)r$",
1364 (instregex "(CLS|CLZ|CNT)(v4i32|v8i16|v16i8)")>;
|
| H A D | AArch64SchedThunderX3T110.td | 821 (instregex "^CLS(W|X)r$", "^CLZ(W|X)r$")>;
1472 (instregex "(CLS|CLZ|CNT)(v4i32|v8i16|v16i8)")>;
|
| H A D | AArch64SchedA64FX.td | 722 def : InstRW<[A64FXWrite_2Cyc_GI0], (instregex "^CLS(W|X)r$",
1500 (instregex "(CLS|CLZ|CNT)(v4i32|v8i16|v16i8)")>;
|
| H A D | AArch64SchedOryon.td | 808 (instregex "^CLS(W|X)r$", "^CLZ(W|X)r$", "^EXTR(W|X)rri")>;
|
| H A D | AArch64SchedA510.td | 740 def : InstRW<[CortexA510Write<3, CortexA510UnitVALU>], (instregex "^(CLS|CLZ|RBIT)_ZPmZ_[BHSD]")>;
|
| H A D | AArch64SchedA320.td | 762 def : InstRW<[CortexA320Write<3, CortexA320UnitVALU>], (instregex "^(CLS|CLZ|RBIT)_ZPmZ_[BHSD]")>;
|
| H A D | AArch64SchedNeoverseV1.td | 1513 def : InstRW<[V1Write_2c_1V01], (instregex "^(CLS|CLZ|CNT|RBIT)_ZPmZ_[BHSD]")>;
|
| H A D | AArch64SchedNeoverseN2.td | 1707 def : InstRW<[N2Write_2c_1V], (instregex "^(CLS|CLZ|CNT|RBIT)_ZPmZ_[BHSD]")>;
|
| H A D | AArch64SchedNeoverseN3.td | 1677 def : InstRW<[N3Write_2c_1V], (instregex "^(CLS|CLZ|CNT|RBIT)_ZPmZ_[BHSD]")>;
|
| H A D | AArch64SchedNeoverseV2.td | 2194 def : InstRW<[V2Write_2c_1V], (instregex "^(CLS|CLZ|CNT|RBIT)_ZPmZ_[BHSD]")>;
|
| H A D | AArch64InstrInfo.td | 3181 defm CLS : OneOperandData<0b000101, "cls">;
5690 defm CLS : SIMDTwoVectorBHS<0, 0b00100, "cls", int_aarch64_neon_cls>;
|
| /freebsd/contrib/llvm-project/clang/lib/Frontend/Rewrite/ |
| H A D | RewriteModernObjC.cpp | 6356 CLS = 0x0, enumerator
7071 flags = CLS; in RewriteObjCClassMetaData()
|
| /freebsd/share/misc/ |
| H A D | usb_vendors | 855 8b29 Alpermann+Velte TC60 CLS
22305 006a PRT.5113 [CLS CANaerospace Gateway]
|
| H A D | pci_vendors | 17440 00a9 VisionLink CLS
|
| /freebsd/contrib/one-true-awk/testdir/ |
| H A D | funstack.in | 12969 @Article{Lindstrom:1974:CLS,
14929 @Article{Adam:1974:CLS,
|