Home
last modified time | relevance | path

Searched refs:BaseInstr (Results 1 – 10 of 10) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoXRivos.td155 let BaseInstr = RI_VEXTRACT in
161 let HasVLOp = 1, BaseInstr = RI_VINSERT, HasVecPolicyOp = 1,
H A DRISCVVLOptimizer.cpp220 switch (RVV->BaseInstr) { in getOperandLog2EEW()
766 switch (RVV->BaseInstr) { in getOperandInfo()
804 switch (RVV->BaseInstr) { in isSupportedInstr()
1180 switch (RVV->BaseInstr) { in isVectorOpUsedAsScalarOp()
1214 switch (RVV->BaseInstr) { in mayReadPastVL()
H A DRISCVInstrInfo.h387 uint16_t BaseInstr; member
H A DRISCVInstrInfoZvk.td243 let BaseInstr = !cast<Instruction>(PseudoToVInst<NAME>.VInst);
260 let BaseInstr = !cast<Instruction>(PseudoToVInst<NAME>.VInst);
H A DRISCVAsmPrinter.cpp1076 OutMI.setOpcode(RVV->BaseInstr); in lowerRISCVVMachineInstrToMCInst()
H A DRISCVInstrInfoVPseudos.td548 Instruction BaseInstr = !cast<Instruction>(PseudoToVInst<NAME>.VInst);
558 let Fields = [ "Pseudo", "BaseInstr" ];
568 let Fields = [ "Pseudo", "BaseInstr", "VLMul", "SEW"];
569 let PrimaryKey = [ "BaseInstr", "VLMul", "SEW"];
1036 let BaseInstr = !cast<Instruction>(BaseInst);
6746 let HasSEWOp = 1, BaseInstr = VMV_X_S in
6751 let HasVLOp = 1, HasSEWOp = 1, BaseInstr = VMV_S_X, isReMaterializable = 1,
6768 let HasSEWOp = 1, BaseInstr = VFMV_F_S in
6774 let HasVLOp = 1, HasSEWOp = 1, BaseInstr = VFMV_S_F, isReMaterializable = 1,
H A DRISCVInstrInfoV.td323 Instruction BaseInstr = !cast<Instruction>(NAME);
329 let Fields = ["Log2EEW", "IsOrdered", "IsStore", "NF", "BaseInstr"];
330 let PrimaryKey = ["BaseInstr"];
H A DRISCVInstrInfo.cpp4793 return RVV->BaseInstr; in getRVVMCOpcode()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCA/
H A DRISCVCustomBehaviour.cpp30 unsigned BaseInstr; member
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVBaseInfo.h676 uint16_t BaseInstr; member