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Searched refs:ArgLocs (Results 1 – 25 of 45) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsCallLowering.cpp336 SmallVector<CCValAssign, 16> ArgLocs; in lowerReturn() local
338 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, in lowerReturn()
349 if (!handleAssignments(RetHandler, RetInfos, CCInfo, ArgLocs, MIRBuilder)) in lowerReturn()
385 SmallVector<CCValAssign, 16> ArgLocs; in lowerFormalArguments() local
386 MipsCCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, in lowerFormalArguments()
402 if (!handleAssignments(Handler, ArgInfos, CCInfo, ArgLocs, MIRBuilder)) in lowerFormalArguments()
498 SmallVector<CCValAssign, 8> ArgLocs; in lowerCall() local
507 MipsCCState CCInfo(Info.CallConv, IsCalleeVarArg, MF, ArgLocs, in lowerCall()
522 if (!handleAssignments(ArgHandler, ArgInfos, CCInfo, ArgLocs, MIRBuilder)) in lowerCall()
554 SmallVector<CCValAssign, 8> ArgLocs; in lowerCall() local
[all …]
H A DMipsISelLowering.cpp3352 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
3354 CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, *DAG.getContext(), in LowerCall()
3442 for (unsigned i = 0, e = ArgLocs.size(), OutIdx = 0; i != e; ++i, ++OutIdx) { in LowerCall()
3444 CCValAssign &VA = ArgLocs[i]; in LowerCall()
3488 Register LocRegHigh = ArgLocs[++i].getLocReg(); in LowerCall()
3818 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local
3819 MipsCCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerFormalArguments()
3836 for (unsigned i = 0, e = ArgLocs.size(), InsIdx = 0; i != e; ++i, ++InsIdx) { in LowerFormalArguments()
3837 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments()
3884 CCValAssign &NextVA = ArgLocs[++i]; in LowerFormalArguments()
[all …]
H A DMipsFastISel.cpp1146 SmallVector<CCValAssign, 16> ArgLocs; in processCallArgs() local
1147 CCState CCInfo(CC, false, *FuncInfo.MF, ArgLocs, *Context); in processCallArgs()
1158 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in processCallArgs()
1159 CCValAssign &VA = ArgLocs[i]; in processCallArgs()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLoweringCall.cpp1486 static bool isSortedByValueNo(ArrayRef<CCValAssign> ArgLocs) { in isSortedByValueNo() argument
1488 ArgLocs, [](const CCValAssign &A, const CCValAssign &B) -> bool { in isSortedByValueNo()
1722 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local
1723 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerFormalArguments()
1739 assert(isSortedByValueNo(ArgLocs) && in LowerFormalArguments()
1743 for (unsigned I = 0, InsIndex = 0, E = ArgLocs.size(); I != E; in LowerFormalArguments()
1746 CCValAssign &VA = ArgLocs[I]; in LowerFormalArguments()
1758 getv64i1Argument(VA, ArgLocs[++I], Chain, DAG, dl, Subtarget); in LowerFormalArguments()
2070 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
2071 CCState CCInfo(CallConv, isVarArg, MF, ArgLocs, *DAG.getContext()); in LowerCall()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUCallLowering.cpp283 SmallVector<CCValAssign, 16> ArgLocs; in canLowerReturn() local
285 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, in canLowerReturn()
517 SmallVector<CCValAssign, 16> ArgLocs; in lowerFormalArgumentsKernel() local
518 CCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, F.getContext()); in lowerFormalArgumentsKernel()
605 SmallVector<CCValAssign, 16> ArgLocs; in lowerFormalArguments() local
606 CCState CCInfo(CC, F.isVarArg(), MF, ArgLocs, F.getContext()); in lowerFormalArguments()
731 if (!handleAssignments(Handler, SplitArgs, CCInfo, ArgLocs, B)) in lowerFormalArguments()
1341 SmallVector<CCValAssign, 16> ArgLocs; in lowerTailCall() local
1342 CCState CCInfo(Info.CallConv, Info.IsVarArg, MF, ArgLocs, F.getContext()); in lowerTailCall()
1363 if (!handleAssignments(Handler, OutArgs, CCInfo, ArgLocs, MIRBuilder)) in lowerTailCall()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCISelLowering.cpp261 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
262 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCall()
284 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCall()
285 CCValAssign &VA = ArgLocs[i]; in LowerCall()
477 SmallVector<CCValAssign, 16> ArgLocs; in LowerCallArguments() local
478 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCallArguments()
500 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCallArguments()
501 CCValAssign &VA = ArgLocs[i]; in LowerCallArguments()
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp336 SmallVectorImpl<CCValAssign> &ArgLocs, in AnalyzeArguments() argument
507 SmallVector<CCValAssign, 16> ArgLocs; in LowerCCCArguments() local
508 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCArguments()
510 AnalyzeArguments(CCInfo, ArgLocs, Ins); in LowerCCCArguments()
518 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCCCArguments()
519 CCValAssign &VA = ArgLocs[i]; in LowerCCCArguments()
586 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCCCArguments()
692 SmallVector<CCValAssign, 16> ArgLocs; in LowerCCCCallTo() local
693 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCCallTo()
695 AnalyzeArguments(CCInfo, ArgLocs, Outs); in LowerCCCCallTo()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/BPF/
H A DBPFISelLowering.cpp357 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local
358 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerFormalArguments()
362 for (size_t I = 0; I < ArgLocs.size(); ++I) { in LowerFormalArguments()
363 auto &VA = ArgLocs[I]; in LowerFormalArguments()
461 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
462 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerCall()
485 for (size_t i = 0; i < std::min(ArgLocs.size(), MaxArgs); ++i) { in LowerCall()
486 CCValAssign &VA = ArgLocs[i]; in LowerCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kISelLowering.cpp576 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
580 M68kCCState CCInfo(ArgTypes, CallConv, IsVarArg, MF, ArgLocs, in LowerCall()
616 if (!ArgLocs.back().isMemLoc()) in LowerCall()
619 if (ArgLocs.back().getLocMemOffset() != 0) in LowerCall()
640 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCall()
647 CCValAssign &VA = ArgLocs[i]; in LowerCall()
725 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCall()
726 CCValAssign &VA = ArgLocs[i]; in LowerCall()
930 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local
934 M68kCCState CCInfo(ArgTypes, CCID, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerFormalArguments()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVCallLowering.cpp438 SmallVector<CCValAssign, 16> ArgLocs; in canLowerReturn() local
439 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, in canLowerReturn()
574 SmallVector<CCValAssign, 16> ArgLocs; in lowerFormalArguments() local
575 CCState CCInfo(CC, F.isVarArg(), MIRBuilder.getMF(), ArgLocs, F.getContext()); in lowerFormalArguments()
577 !handleAssignments(Handler, SplitArgInfos, CCInfo, ArgLocs, MIRBuilder)) in lowerFormalArguments()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCallLowering.cpp655 SmallVector<CCValAssign, 16> ArgLocs; in determineAndHandleAssignments() local
657 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, F.getContext()); in determineAndHandleAssignments()
661 return handleAssignments(Handler, Args, CCInfo, ArgLocs, MIRBuilder, in determineAndHandleAssignments()
737 SmallVectorImpl<CCValAssign> &ArgLocs, in handleAssignments() argument
762 assert(j < ArgLocs.size() && "Skipped too many arg locs"); in handleAssignments()
763 CCValAssign &VA = ArgLocs[j]; in handleAssignments()
769 Args[i], ArrayRef(ArgLocs).slice(j), &Thunk); in handleAssignments()
818 assert((j + (NumParts - 1)) < ArgLocs.size() && in handleAssignments()
838 CCValAssign &VA = ArgLocs[j + Idx]; in handleAssignments()
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp444 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments_32() local
445 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerFormalArguments_32()
453 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i, ++InIdx) { in LowerFormalArguments_32()
454 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments_32()
477 CCValAssign &NextVA = ArgLocs[++i]; in LowerFormalArguments_32()
637 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments_64() local
638 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerFormalArguments_64()
645 for (const CCValAssign &VA : ArgLocs) { in LowerFormalArguments_64()
840 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall_32() local
841 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCall_32()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.cpp527 SmallVector<CCValAssign, 16> ArgLocs; in canLowerReturn() local
529 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, in canLowerReturn()
552 SmallVector<CCValAssign, 16> ArgLocs; in handleMustTailForwardedRegisters() local
553 CCState CCInfo(F.getCallingConv(), /*IsVarArg=*/true, MF, ArgLocs, in handleMustTailForwardedRegisters()
759 SmallVector<CCValAssign, 16> ArgLocs; in lowerFormalArguments() local
760 CCState CCInfo(F.getCallingConv(), F.isVarArg(), MF, ArgLocs, F.getContext()); in lowerFormalArguments()
762 !handleAssignments(Handler, SplitArgs, CCInfo, ArgLocs, MIRBuilder)) in lowerFormalArguments()
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYISelLowering.cpp346 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local
347 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerFormalArguments()
351 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerFormalArguments()
352 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments()
524 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
525 CCState ArgCCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerCall()
572 for (unsigned i = 0, j = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCall()
573 CCValAssign &VA = ArgLocs[i]; in LowerCall()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DCallLowering.h425 SmallVectorImpl<CCValAssign> &ArgLocs,
434 const SmallVectorImpl<CCValAssign> &ArgLocs,
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelLowering.cpp435 SmallVector<CCValAssign, 16> ArgLocs; in LowerCCCArguments() local
436 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCArguments()
444 for (const CCValAssign &VA : ArgLocs) { in LowerCCCArguments()
600 SmallVector<CCValAssign, 16> ArgLocs; in LowerCCCCallTo() local
601 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCCallTo()
654 for (unsigned I = 0, J = 0, E = ArgLocs.size(); I != E; ++I) { in LowerCCCCallTo()
655 CCValAssign &VA = ArgLocs[I]; in LowerCCCCallTo()
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaISelLowering.cpp439 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local
440 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerFormalArguments()
445 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerFormalArguments()
446 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments()
595 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
596 CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerCall()
614 for (unsigned I = 0, E = ArgLocs.size(); I != E; ++I) { in LowerCall()
615 CCValAssign &VA = ArgLocs[I]; in LowerCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp1180 SmallVectorImpl<CCValAssign> &ArgLocs, in analyzeArguments() argument
1329 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local
1330 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerFormalArguments()
1337 analyzeArguments(nullptr, &MF.getFunction(), &DL, Ins, ArgLocs, CCInfo, in LowerFormalArguments()
1342 for (CCValAssign &VA : ArgLocs) { in LowerFormalArguments()
1439 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
1440 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCall()
1463 analyzeArguments(&CLI, F, &DAG.getDataLayout(), Outs, ArgLocs, CCInfo, in LowerCall()
1477 for (AI = 0, AE = ArgLocs.size(); AI != AE; ++AI) { in LowerCall()
1478 CCValAssign &VA = ArgLocs[AI]; in LowerCall()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp996 SmallVector<CCValAssign, 16> ArgLocs; in LowerCCCCallTo() local
997 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCCallTo()
1022 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCCCCallTo()
1023 CCValAssign &VA = ArgLocs[i]; in LowerCCCCallTo()
1147 SmallVector<CCValAssign, 16> ArgLocs; in LowerCCCArguments() local
1148 CCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCCCArguments()
1172 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCCCArguments()
1174 CCValAssign &VA = ArgLocs[i]; in LowerCCCArguments()
/freebsd/contrib/llvm-project/llvm/lib/TableGen/
H A DTGParser.cpp772 SmallVector<SMLoc> ArgLocs; in ParseSubClassReference() local
773 if (ParseTemplateArgValueList(Result.TemplateArgs, ArgLocs, CurRec, in ParseSubClassReference()
779 if (CheckTemplateArgValues(Result.TemplateArgs, ArgLocs, Result.Rec)) { in ParseSubClassReference()
809 SmallVector<SMLoc> ArgLocs; in ParseSubMultiClassReference() local
810 if (ParseTemplateArgValueList(Result.TemplateArgs, ArgLocs, &CurMC->Rec, in ParseSubMultiClassReference()
2772 SmallVector<SMLoc> ArgLocs; in ParseSimpleValue() local
2774 if (ParseTemplateArgValueList(Args, ArgLocs, CurRec, Class)) in ParseSimpleValue()
2777 if (CheckTemplateArgValues(Args, ArgLocs, Class)) in ParseSimpleValue()
3253 SmallVectorImpl<SMLoc> &ArgLocs, Record *CurRec, const Record *ArgsRec) { in ParseTemplateArgValueList() argument
3268 SMLoc ValueLoc = ArgLocs.emplace_back(Lex.getLoc()); in ParseTemplateArgValueList()
H A DTGParser.h299 SmallVectorImpl<SMLoc> &ArgLocs,
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMFastISel.cpp1945 SmallVector<CCValAssign, 16> ArgLocs; in ProcessCallArgs() local
1946 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, ArgLocs, *Context); in ProcessCallArgs()
1952 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in ProcessCallArgs()
1953 CCValAssign &VA = ArgLocs[i]; in ProcessCallArgs()
1967 !VA.isRegLoc() || !ArgLocs[++i].isRegLoc()) in ProcessCallArgs()
2002 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in ProcessCallArgs()
2003 CCValAssign &VA = ArgLocs[i]; in ProcessCallArgs()
2051 CCValAssign &NextVA = ArgLocs[++i]; in ProcessCallArgs()
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp451 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local
452 CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerFormalArguments()
460 for (const CCValAssign &VA : ArgLocs) { in LowerFormalArguments()
544 unsigned ArgOffset = ArgLocs.size() * 8; in LowerFormalArguments()
590 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
591 CCState CCInfo(CLI.CallConv, CLI.IsVarArg, DAG.getMachineFunction(), ArgLocs, in LowerCall()
676 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCall()
677 CCValAssign &VA = ArgLocs[i]; in LowerCall()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp4288 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments_32SVR4() local
4289 PPCCCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs, in LowerFormalArguments_32SVR4()
4301 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerFormalArguments_32SVR4()
4302 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments_32SVR4()
4353 Register RegHi = MF.addLiveIn(ArgLocs[++i].getLocReg(), RC); in LowerFormalArguments_32SVR4()
6020 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall_32SVR4() local
6021 PPCCCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); in LowerCall_32SVR4()
6104 for (unsigned i = 0, RealArgIdx = 0, j = 0, e = ArgLocs.size(); in LowerCall_32SVR4()
6107 CCValAssign &VA = ArgLocs[i]; in LowerCall_32SVR4()
6165 RegsToPass.push_back(std::make_pair(ArgLocs[++i].getLocReg(), in LowerCall_32SVR4()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp499 SmallVector<CCValAssign, 16> ArgLocs; in LowerCall() local
500 HexagonCCState CCInfo(CallConv, TreatAsVarArg, MF, ArgLocs, *DAG.getContext(), in LowerCall()
515 for (const CCValAssign &VA : ArgLocs) { in LowerCall()
537 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerCall()
538 CCValAssign &VA = ArgLocs[i]; in LowerCall()
873 SmallVector<CCValAssign, 16> ArgLocs; in LowerFormalArguments() local
874 HexagonCCState CCInfo(CallConv, TreatAsVarArg, MF, ArgLocs, in LowerFormalArguments()
910 for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { in LowerFormalArguments()
911 CCValAssign &VA = ArgLocs[i]; in LowerFormalArguments()

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