4273   SmallVector<CCValAssign, 16> ArgLocs;  in LowerFormalArguments_32SVR4()  local
4274   PPCCCState CCInfo(CallConv, isVarArg, DAG.getMachineFunction(), ArgLocs,  in LowerFormalArguments_32SVR4()
4286   for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) {  in LowerFormalArguments_32SVR4()
4287     CCValAssign &VA = ArgLocs[i];  in LowerFormalArguments_32SVR4()
4338         Register RegHi = MF.addLiveIn(ArgLocs[++i].getLocReg(), RC);  in LowerFormalArguments_32SVR4()
6006   SmallVector<CCValAssign, 16> ArgLocs;  in LowerCall_32SVR4()  local
6007   PPCCCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext());  in LowerCall_32SVR4()
6090   for (unsigned i = 0, RealArgIdx = 0, j = 0, e = ArgLocs.size();  in LowerCall_32SVR4()
6093     CCValAssign &VA = ArgLocs[i];  in LowerCall_32SVR4()
6151         RegsToPass.push_back(std::make_pair(ArgLocs[++i].getLocReg(),  in LowerCall_32SVR4()
7208   SmallVector<CCValAssign, 16> ArgLocs;  in LowerFormalArguments_AIX()  local
7212   AIXCCState CCInfo(CallConv, isVarArg, MF, ArgLocs, *DAG.getContext());  in LowerFormalArguments_AIX()
7222   for (size_t I = 0, End = ArgLocs.size(); I != End; /* No increment here */) {  in LowerFormalArguments_AIX()
7223     CCValAssign &VA = ArgLocs[I++];  in LowerFormalArguments_AIX()
7268         assert(I != End && ArgLocs[I].isRegLoc() && ArgLocs[I].needsCustom() &&  in LowerFormalArguments_AIX()
7270         VA = ArgLocs[I++];  in LowerFormalArguments_AIX()
7290       if (I != End && ArgLocs[I].isRegLoc() && ArgLocs[I].needsCustom()) {  in LowerFormalArguments_AIX()
7390       for (; Offset != StackSize && ArgLocs[I].isRegLoc();  in LowerFormalArguments_AIX()
7392         assert(ArgLocs[I].getValNo() == VA.getValNo() &&  in LowerFormalArguments_AIX()
7395         const CCValAssign RL = ArgLocs[I++];  in LowerFormalArguments_AIX()
7401         assert(ArgLocs[I].getValNo() == VA.getValNo() &&  in LowerFormalArguments_AIX()
7403         assert(ArgLocs[I].isMemLoc() && "Expected MemLoc for remaining bytes.");  in LowerFormalArguments_AIX()
7507   SmallVector<CCValAssign, 16> ArgLocs;  in LowerCall_AIX()  local
7508   AIXCCState CCInfo(CFlags.CallConv, CFlags.IsVarArg, MF, ArgLocs,  in LowerCall_AIX()
7546   for (unsigned I = 0, E = ArgLocs.size(); I != E;) {  in LowerCall_AIX()
7547     const unsigned ValNo = ArgLocs[I].getValNo();  in LowerCall_AIX()
7572       while (LoadOffset + PtrByteSize <= ByValSize && ArgLocs[I].isRegLoc()) {  in LowerCall_AIX()
7576         const CCValAssign &ByValVA = ArgLocs[I++];  in LowerCall_AIX()
7586       assert(ArgLocs[I].getValNo() == ValNo &&  in LowerCall_AIX()
7589       if (ArgLocs[I].isMemLoc()) {  in LowerCall_AIX()
7591         const CCValAssign &ByValVA = ArgLocs[I++];  in LowerCall_AIX()
7641       const CCValAssign &ByValVA = ArgLocs[I++];  in LowerCall_AIX()
7646     CCValAssign &VA = ArgLocs[I++];  in LowerCall_AIX()
7684         assert(ArgLocs[I].isRegLoc() && ArgLocs[I].needsCustom() &&  in LowerCall_AIX()
7686         CCValAssign RegVA = ArgLocs[I++];  in LowerCall_AIX()
7703       if (I != E && ArgLocs[I].isRegLoc() && ArgLocs[I].needsCustom() &&  in LowerCall_AIX()
7704           ArgLocs[I].getValNo() == OriginalValNo) {  in LowerCall_AIX()
7760         CCValAssign &PeekArg = ArgLocs[I];  in LowerCall_AIX()
7763           CCValAssign &GPR2 = ArgLocs[I++];  in LowerCall_AIX()