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Searched refs:AddrReg (Results 1 – 25 of 34) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchExpandAtomicPseudoInsts.cpp154 Register AddrReg = MI.getOperand(2).getReg(); in doAtomicBinOpExpansion() local
164 .addReg(AddrReg) in doAtomicBinOpExpansion()
211 .addReg(AddrReg) in doAtomicBinOpExpansion()
245 Register AddrReg = MI.getOperand(2).getReg(); in doMaskedAtomicBinOpExpansion()
258 .addReg(AddrReg) in doMaskedAtomicBinOpExpansion()
293 .addReg(AddrReg) in doMaskedAtomicBinOpExpansion()
384 Register AddrReg = MI.getOperand(3).getReg(); in expandAtomicMinMaxOp()
394 .addReg(AddrReg) in expandAtomicMinMaxOp()
451 .addReg(AddrReg) in expandAtomicMinMaxOp()
498 Register AddrReg in expandAtomicCmpXchg()
251 Register AddrReg = MI.getOperand(2).getReg(); doMaskedAtomicBinOpExpansion() local
399 Register AddrReg = MI.getOperand(3).getReg(); expandAtomicMinMaxOp() local
521 Register AddrReg = MI.getOperand(2).getReg(); expandAtomicCmpXchg() local
[all...]
H A DLoongArchExpandPseudoInsts.cpp722 Register AddrReg = IsTailCall ? LoongArch::R19 : LoongArch::R1; in expandFunctionCALL() local
727 expandLargeAddressLoad(MBB, MBBI, NextMBBI, LAOpcode, MO, Func, AddrReg, in expandFunctionCALL()
729 CALL = BuildMI(MBB, MBBI, DL, TII->get(Opcode)).addReg(AddrReg).addImm(0); in expandFunctionCALL()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVExpandAtomicPseudoInsts.cpp267 Register AddrReg = MI.getOperand(2).getReg(); in doAtomicBinOpExpansion()
278 .addReg(AddrReg); in insertMaskedMerge()
292 .addReg(AddrReg) in insertMaskedMerge()
332 Register AddrReg = MI.getOperand(2).getReg(); in doMaskedAtomicBinOpExpansion()
347 .addReg(AddrReg); in doMaskedAtomicBinOpExpansion()
380 .addReg(AddrReg) in expandAtomicBinOp()
473 Register AddrReg = MI.getOperand(3).getReg(); in expandAtomicMinMaxOp()
488 .addReg(AddrReg); in expandAtomicMinMaxOp()
540 .addReg(AddrReg)
637 Register AddrReg in expandAtomicCmpXchg()
242 Register AddrReg = MI.getOperand(2).getReg(); doAtomicBinOpExpansion() local
304 Register AddrReg = MI.getOperand(2).getReg(); doMaskedAtomicBinOpExpansion() local
444 Register AddrReg = MI.getOperand(3).getReg(); expandAtomicMinMaxOp() local
608 Register AddrReg = MI.getOperand(2).getReg(); expandAtomicCmpXchg() local
[all...]
H A DRISCVAsmPrinter.cpp379 const MachineOperand &AddrReg = MI->getOperand(OpNo); in PrintAsmMemoryOperand() local
384 if (!AddrReg.isReg()) in PrintAsmMemoryOperand()
398 OS << "(" << RISCVInstPrinter::getRegisterName(AddrReg.getReg()) << ")"; in PrintAsmMemoryOperand()
531 Register AddrReg = MI.getOperand(0).getReg(); in LowerKCFI_CHECK() local
534 assert(std::next(MI.getIterator())->getOperand(0).getReg() == AddrReg && in LowerKCFI_CHECK()
545 return Reg != AddrReg && !STI->isRegisterReservedByUser(Reg); in LowerKCFI_CHECK()
557 if (AddrReg == RISCV::X0) { in LowerKCFI_CHECK()
578 .addReg(AddrReg) in LowerKCFI_CHECK()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsNaClELFStreamer.cpp101 void emitMask(unsigned AddrReg, unsigned MaskReg, in emitMask() argument
105 MaskInst.addOperand(MCOperand::createReg(AddrReg)); in emitMask()
106 MaskInst.addOperand(MCOperand::createReg(AddrReg)); in emitMask()
114 unsigned AddrReg = MI.getOperand(0).getReg(); in sandboxIndirectJump() local
117 emitMask(AddrReg, IndirectBranchMaskReg, STI); in sandboxIndirectJump()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCExpandPseudos.cpp65 Register AddrReg = MF.getRegInfo().createVirtualRegister(&ARC::GPR32RegClass); in expandStore() local
68 BuildMI(*SI.getParent(), SI, SI.getDebugLoc(), TII->get(AddOpc), AddrReg) in expandStore()
74 .addReg(AddrReg) in expandStore()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/GISel/
H A DM68kCallLowering.cpp85 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress() local
87 return AddrReg.getReg(0); in getStackAddress()
178 MachineInstrBuilder AddrReg = MIRBuilder.buildFrameIndex(FramePtr, FI); in getStackAddress() local
180 return AddrReg.getReg(0); in getStackAddress()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600InstrInfo.cpp1097 unsigned AddrReg; in buildIndirectWrite() local
1100 case 0: AddrReg = R600::R600_AddrRegClass.getRegister(Address); break; in buildIndirectWrite()
1101 case 1: AddrReg = R600::R600_Addr_YRegClass.getRegister(Address); break; in buildIndirectWrite()
1102 case 2: AddrReg = R600::R600_Addr_ZRegClass.getRegister(Address); break; in buildIndirectWrite()
1103 case 3: AddrReg = R600::R600_Addr_WRegClass.getRegister(Address); break; in buildIndirectWrite()
1110 AddrReg, ValueReg) in buildIndirectWrite()
1129 unsigned AddrReg; in buildIndirectRead() local
1132 case 0: AddrReg = R600::R600_AddrRegClass.getRegister(Address); break; in buildIndirectRead()
1133 case 1: AddrReg = R600::R600_Addr_YRegClass.getRegister(Address); break; in buildIndirectRead()
1134 case 2: AddrReg = R600::R600_Addr_ZRegClass.getRegister(Address); break; in buildIndirectRead()
[all …]
H A DSILoadStoreOptimizer.cpp121 const MachineOperand *AddrReg[MaxAddressRegs]; member
133 if (AddrReg[i]->isImm() || AddrRegNext.isImm()) { in hasSameBaseAddress()
134 if (AddrReg[i]->isImm() != AddrRegNext.isImm() || in hasSameBaseAddress()
135 AddrReg[i]->getImm() != AddrRegNext.getImm()) { in hasSameBaseAddress()
143 if (AddrReg[i]->getReg() != AddrRegNext.getReg() || in hasSameBaseAddress()
144 AddrReg[i]->getSubReg() != AddrRegNext.getSubReg()) { in hasSameBaseAddress()
153 const MachineOperand *AddrOp = AddrReg[i]; in hasMergeableAddress()
848 AddrReg[J] = &I->getOperand(AddrIdx[J]); in setMI()
1296 const auto *AddrReg = TII->getNamedOperand(*CI.I, AMDGPU::OpName::addr); in mergeRead2Pair() local
1313 Register BaseReg = AddrReg->getReg(); in mergeRead2Pair()
[all …]
H A DAMDGPUCallLowering.cpp114 auto AddrReg = MIRBuilder.buildFrameIndex( in getStackAddress() local
117 return AddrReg.getReg(0); in getStackAddress()
228 auto AddrReg = MIRBuilder.buildPtrAdd(PtrTy, SPReg, OffsetReg); in getStackAddress() local
230 return AddrReg.getReg(0); in getStackAddress()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SIMDInstrOpt.cpp508 unsigned SeqReg, AddrReg; in optimizeLdStInterleave()
522 AddrReg = MI.getOperand(1).getReg(); in optimizeLdStInterleave()
576 .addReg(AddrReg) in optimizeLdStInterleave()
616 .addReg(AddrReg) in optimizeLdStInterleave()
621 .addReg(AddrReg) in optimizeLdStInterleave()
507 unsigned SeqReg, AddrReg; optimizeLdStInterleave() local
H A DAArch64AsmPrinter.cpp486 Register AddrReg = MI.getOperand(0).getReg(); in LowerKCFI_CHECK() local
489 assert(std::next(MI.getIterator())->getOperand(0).getReg() == AddrReg && in LowerKCFI_CHECK()
495 if (AddrReg == AArch64::XZR) { in LowerKCFI_CHECK()
498 AddrReg = getXRegFromWReg(ScratchRegs[0]); in LowerKCFI_CHECK()
500 .addReg(AddrReg) in LowerKCFI_CHECK()
510 if (Reg == getWRegFromXReg(AddrReg)) { in LowerKCFI_CHECK()
515 assert(ScratchRegs[0] != AddrReg && ScratchRegs[1] != AddrReg && in LowerKCFI_CHECK()
530 .addReg(AddrReg) in LowerKCFI_CHECK()
567 switch (AddrReg) { in LowerKCFI_CHECK()
569 AddrIndex = AddrReg - AArch64::X0; in LowerKCFI_CHECK()
H A DAArch64ExpandPseudoInsts.cpp247 Register AddrReg = MI.getOperand(2).getReg(); in expandCMP_SWAP() local
269 .addReg(AddrReg); in expandCMP_SWAP()
286 .addReg(AddrReg); in expandCMP_SWAP()
327 Register AddrReg = MI.getOperand(3).getReg(); in expandCMP_SWAP_128() local
375 .addReg(AddrReg); in expandCMP_SWAP_128()
404 .addReg(AddrReg); in expandCMP_SWAP_128()
418 .addReg(AddrReg); in expandCMP_SWAP_128()
H A DAArch64FastISel.cpp232 bool emitStoreRelease(MVT VT, unsigned SrcReg, unsigned AddrReg,
2056 unsigned AddrReg, in emitStoreRelease() argument
2069 AddrReg = constrainOperandRegClass(II, AddrReg, 1); in emitStoreRelease()
2072 .addReg(AddrReg) in emitStoreRelease()
2196 Register AddrReg = getRegForValue(PtrV); in selectStore() local
2197 return emitStoreRelease(VT, SrcReg, AddrReg, in selectStore()
2515 Register AddrReg = getRegForValue(BI->getOperand(0)); in selectIndirectBr() local
2516 if (AddrReg == 0) in selectIndirectBr()
2525 AddrReg = constrainOperandRegClass(II, AddrReg, II.getNumDefs()); in selectIndirectBr()
2526 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, MIMD, II).addReg(AddrReg); in selectIndirectBr()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCCallLowering.cpp179 MachineInstrBuilder AddrReg = MIRBuilder.buildFrameIndex(FramePtr, FI); in getStackAddress() local
181 return AddrReg.getReg(0); in getStackAddress()
H A DPPCInstructionSelector.cpp750 Register AddrReg = I.getOperand(1).getReg(); in select() local
754 MachineOperand::CreateReg(AddrReg, /* isDef */ false, in select()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86CallLowering.cpp
H A DX86SpeculativeLoadHardening.cpp1160 Register AddrReg = MRI->createVirtualRegister(&X86::GR64RegClass); in tracePredStateThroughIndirectBranches() local
1162 BuildMI(MBB, InsertPt, DebugLoc(), TII->get(X86::LEA64r), AddrReg) in tracePredStateThroughIndirectBranches()
1173 .addReg(AddrReg, RegState::Kill); in tracePredStateThroughIndirectBranches()
H A DX86InstructionSelector.cpp
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86CallLowering.cpp103 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress() local
106 return AddrReg.getReg(0); in getStackAddress()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMCallLowering.cpp113 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress() local
116 return AddrReg.getReg(0); in getStackAddress()
H A DARMExpandPseudoInsts.cpp1819 Register AddrReg = MI.getOperand(2).getReg(); in ExpandCMP_SWAP() local
1857 MIB.addReg(AddrReg); in ExpandCMP_SWAP()
1881 .addReg(AddrReg); in ExpandCMP_SWAP()
1949 Register AddrReg = MI.getOperand(2).getReg(); in ExpandCMP_SWAP_64() local
1977 MIB.addReg(AddrReg).add(predOps(ARMCC::AL)); in ExpandCMP_SWAP_64()
2006 MIB.addReg(AddrReg).add(predOps(ARMCC::AL)); in ExpandCMP_SWAP_64()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.cpp153 auto AddrReg = MIRBuilder.buildFrameIndex(LLT::pointer(0, 64), FI); in getStackAddress() local
154 return AddrReg.getReg(0); in getStackAddress()
275 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress() local
278 return AddrReg.getReg(0); in getStackAddress()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsCallLowering.cpp240 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress()
241 return AddrReg.getReg(0); in getStackAddress()
239 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); getStackAddress() local
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVCallLowering.cpp82 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress() local
85 return AddrReg.getReg(0); in getStackAddress()

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