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Searched refs:AddrReg (Results 1 – 25 of 34) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchExpandAtomicPseudoInsts.cpp170 Register AddrReg = MI.getOperand(2).getReg(); in doAtomicBinOpExpansion() local
180 .addReg(AddrReg) in doAtomicBinOpExpansion()
227 .addReg(AddrReg) in doAtomicBinOpExpansion()
262 Register AddrReg = MI.getOperand(2).getReg(); in doMaskedAtomicBinOpExpansion() local
275 .addReg(AddrReg) in doMaskedAtomicBinOpExpansion()
310 .addReg(AddrReg) in doMaskedAtomicBinOpExpansion()
399 Register AddrReg = MI.getOperand(IsMasked ? 3 : 2).getReg(); in expandAtomicMinMaxOp() local
407 .addReg(AddrReg) in expandAtomicMinMaxOp()
480 .addReg(AddrReg) in expandAtomicMinMaxOp()
528 Register AddrReg = MI.getOperand(2).getReg(); in expandAtomicCmpXchg() local
[all …]
H A DLoongArchExpandPseudoInsts.cpp589 Register AddrReg = in expandFunctionCALL() local
597 expandLargeAddressLoad(MBB, MBBI, NextMBBI, LAOpcode, MO, Func, AddrReg, in expandFunctionCALL()
599 CALL = BuildMI(MBB, MBBI, DL, TII->get(Opcode)).addReg(AddrReg).addImm(0); in expandFunctionCALL()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsNaClELFStreamer.cpp100 void emitMask(MCRegister AddrReg, unsigned MaskReg, in emitMask() argument
104 MaskInst.addOperand(MCOperand::createReg(AddrReg)); in emitMask()
105 MaskInst.addOperand(MCOperand::createReg(AddrReg)); in emitMask()
113 MCRegister AddrReg = MI.getOperand(0).getReg(); in sandboxIndirectJump() local
116 emitMask(AddrReg, IndirectBranchMaskReg, STI); in sandboxIndirectJump()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVExpandAtomicPseudoInsts.cpp265 Register AddrReg = MI.getOperand(2).getReg(); in doAtomicBinOpExpansion() local
276 .addReg(AddrReg); in doAtomicBinOpExpansion()
290 .addReg(AddrReg) in doAtomicBinOpExpansion()
330 Register AddrReg = MI.getOperand(2).getReg(); in doMaskedAtomicBinOpExpansion() local
345 .addReg(AddrReg); in doMaskedAtomicBinOpExpansion()
378 .addReg(AddrReg) in doMaskedAtomicBinOpExpansion()
471 Register AddrReg = MI.getOperand(3).getReg(); in expandAtomicMinMaxOp() local
486 .addReg(AddrReg); in expandAtomicMinMaxOp()
538 .addReg(AddrReg) in expandAtomicMinMaxOp()
635 Register AddrReg = MI.getOperand(2).getReg(); in expandAtomicCmpXchg() local
[all …]
H A DRISCVAsmPrinter.cpp417 const MachineOperand &AddrReg = MI->getOperand(OpNo); in PrintAsmMemoryOperand() local
422 if (!AddrReg.isReg()) in PrintAsmMemoryOperand()
445 OS << "(" << RISCVInstPrinter::getRegisterName(AddrReg.getReg()) << ")"; in PrintAsmMemoryOperand()
637 Register AddrReg = MI.getOperand(0).getReg(); in LowerKCFI_CHECK() local
640 assert(std::next(MI.getIterator())->getOperand(0).getReg() == AddrReg && in LowerKCFI_CHECK()
651 return Reg != AddrReg && !STI->isRegisterReservedByUser(Reg); in LowerKCFI_CHECK()
663 if (AddrReg == RISCV::X0) { in LowerKCFI_CHECK()
684 .addReg(AddrReg) in LowerKCFI_CHECK()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCExpandPseudos.cpp65 Register AddrReg = MF.getRegInfo().createVirtualRegister(&ARC::GPR32RegClass); in expandStore() local
68 BuildMI(*SI.getParent(), SI, SI.getDebugLoc(), TII->get(AddOpc), AddrReg) in expandStore()
74 .addReg(AddrReg) in expandStore()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/GISel/
H A DM68kCallLowering.cpp85 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress() local
87 return AddrReg.getReg(0); in getStackAddress()
178 MachineInstrBuilder AddrReg = MIRBuilder.buildFrameIndex(FramePtr, FI); in getStackAddress() local
180 return AddrReg.getReg(0); in getStackAddress()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600InstrInfo.cpp1088 MCRegister AddrReg; in buildIndirectWrite() local
1091 case 0: AddrReg = R600::R600_AddrRegClass.getRegister(Address); break; in buildIndirectWrite()
1092 case 1: AddrReg = R600::R600_Addr_YRegClass.getRegister(Address); break; in buildIndirectWrite()
1093 case 2: AddrReg = R600::R600_Addr_ZRegClass.getRegister(Address); break; in buildIndirectWrite()
1094 case 3: AddrReg = R600::R600_Addr_WRegClass.getRegister(Address); break; in buildIndirectWrite()
1101 AddrReg, ValueReg) in buildIndirectWrite()
1120 MCRegister AddrReg; in buildIndirectRead() local
1123 case 0: AddrReg = R600::R600_AddrRegClass.getRegister(Address); break; in buildIndirectRead()
1124 case 1: AddrReg = R600::R600_Addr_YRegClass.getRegister(Address); break; in buildIndirectRead()
1125 case 2: AddrReg = R600::R600_Addr_ZRegClass.getRegister(Address); break; in buildIndirectRead()
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H A DSILoadStoreOptimizer.cpp122 const MachineOperand *AddrReg[MaxAddressRegs]; member
134 if (AddrReg[i]->isImm() || AddrRegNext.isImm()) { in hasSameBaseAddress()
135 if (AddrReg[i]->isImm() != AddrRegNext.isImm() || in hasSameBaseAddress()
136 AddrReg[i]->getImm() != AddrRegNext.getImm()) { in hasSameBaseAddress()
144 if (AddrReg[i]->getReg() != AddrRegNext.getReg() || in hasSameBaseAddress()
145 AddrReg[i]->getSubReg() != AddrRegNext.getSubReg()) { in hasSameBaseAddress()
154 const MachineOperand *AddrOp = AddrReg[i]; in hasMergeableAddress()
884 AddrReg[J] = &I->getOperand(AddrIdx[J]); in setMI()
1332 const auto *AddrReg = TII->getNamedOperand(*CI.I, AMDGPU::OpName::addr); in mergeRead2Pair() local
1349 Register BaseReg = AddrReg->getReg(); in mergeRead2Pair()
[all …]
H A DAMDGPUCallLowering.cpp113 auto AddrReg = MIRBuilder.buildFrameIndex( in getStackAddress() local
116 return AddrReg.getReg(0); in getStackAddress()
227 auto AddrReg = MIRBuilder.buildPtrAdd(PtrTy, SPReg, OffsetReg); in getStackAddress() local
229 return AddrReg.getReg(0); in getStackAddress()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64SIMDInstrOpt.cpp506 unsigned SeqReg, AddrReg; in optimizeLdStInterleave() local
520 AddrReg = MI.getOperand(1).getReg(); in optimizeLdStInterleave()
574 .addReg(AddrReg) in optimizeLdStInterleave()
614 .addReg(AddrReg) in optimizeLdStInterleave()
619 .addReg(AddrReg) in optimizeLdStInterleave()
H A DAArch64FastISel.cpp226 bool emitStoreRelease(MVT VT, Register SrcReg, Register AddrReg,
2052 Register AddrReg, in emitStoreRelease() argument
2065 AddrReg = constrainOperandRegClass(II, AddrReg, 1); in emitStoreRelease()
2068 .addReg(AddrReg) in emitStoreRelease()
2192 Register AddrReg = getRegForValue(PtrV); in selectStore() local
2193 if (!AddrReg) in selectStore()
2195 return emitStoreRelease(VT, SrcReg, AddrReg, in selectStore()
2513 Register AddrReg = getRegForValue(BI->getOperand(0)); in selectIndirectBr() local
2514 if (!AddrReg) in selectIndirectBr()
2523 AddrReg = constrainOperandRegClass(II, AddrReg, II.getNumDefs()); in selectIndirectBr()
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H A DAArch64ExpandPseudoInsts.cpp247 Register AddrReg = MI.getOperand(2).getReg(); in expandCMP_SWAP() local
269 .addReg(AddrReg); in expandCMP_SWAP()
286 .addReg(AddrReg); in expandCMP_SWAP()
327 Register AddrReg = MI.getOperand(3).getReg(); in expandCMP_SWAP_128() local
375 .addReg(AddrReg); in expandCMP_SWAP_128()
404 .addReg(AddrReg); in expandCMP_SWAP_128()
418 .addReg(AddrReg); in expandCMP_SWAP_128()
H A DAArch64AsmPrinter.cpp596 Register AddrReg = MI.getOperand(0).getReg(); in LowerKCFI_CHECK() local
599 assert(std::next(MI.getIterator())->getOperand(0).getReg() == AddrReg && in LowerKCFI_CHECK()
605 if (AddrReg == AArch64::XZR) { in LowerKCFI_CHECK()
608 AddrReg = getXRegFromWReg(ScratchRegs[0]); in LowerKCFI_CHECK()
609 emitMovXReg(AddrReg, AArch64::XZR); in LowerKCFI_CHECK()
616 if (Reg == getWRegFromXReg(AddrReg)) { in LowerKCFI_CHECK()
621 assert(ScratchRegs[0] != AddrReg && ScratchRegs[1] != AddrReg && in LowerKCFI_CHECK()
636 .addReg(AddrReg) in LowerKCFI_CHECK()
665 switch (AddrReg) { in LowerKCFI_CHECK()
667 AddrIndex = AddrReg - AArch64::X0; in LowerKCFI_CHECK()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCCallLowering.cpp176 MachineInstrBuilder AddrReg = MIRBuilder.buildFrameIndex(FramePtr, FI); in getStackAddress() local
178 return AddrReg.getReg(0); in getStackAddress()
H A DPPCInstructionSelector.cpp750 Register AddrReg = I.getOperand(1).getReg(); in select() local
754 MachineOperand::CreateReg(AddrReg, /* isDef */ false, in select()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86CallLowering.cpp
H A DX86SpeculativeLoadHardening.cpp1157 Register AddrReg = MRI->createVirtualRegister(&X86::GR64RegClass); in tracePredStateThroughIndirectBranches() local
1159 BuildMI(MBB, InsertPt, DebugLoc(), TII->get(X86::LEA64r), AddrReg) in tracePredStateThroughIndirectBranches()
1170 .addReg(AddrReg, RegState::Kill); in tracePredStateThroughIndirectBranches()
H A DX86InstructionSelector.cpp
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86CallLowering.cpp102 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress() local
105 return AddrReg.getReg(0); in getStackAddress()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMCallLowering.cpp113 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress() local
116 return AddrReg.getReg(0); in getStackAddress()
H A DARMExpandPseudoInsts.cpp1856 Register AddrReg = MI.getOperand(2).getReg(); in ExpandCMP_SWAP() local
1894 MIB.addReg(AddrReg); in ExpandCMP_SWAP()
1918 .addReg(AddrReg); in ExpandCMP_SWAP()
1986 Register AddrReg = TRI->getSubReg(AddrAndTempReg, ARM::gsub_0); in ExpandCMP_SWAP_64() local
2017 MIB.addReg(AddrReg).add(predOps(ARMCC::AL)); in ExpandCMP_SWAP_64()
2046 MIB.addReg(AddrReg).add(predOps(ARMCC::AL)); in ExpandCMP_SWAP_64()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64CallLowering.cpp155 auto AddrReg = MIRBuilder.buildFrameIndex(LLT::pointer(0, 64), FI); in getStackAddress() local
156 return AddrReg.getReg(0); in getStackAddress()
277 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress() local
280 return AddrReg.getReg(0); in getStackAddress()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsCallLowering.cpp240 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress() local
241 return AddrReg.getReg(0); in getStackAddress()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVCallLowering.cpp74 auto AddrReg = MIRBuilder.buildPtrAdd(p0, SPReg, OffsetReg); in getStackAddress() local
77 return AddrReg.getReg(0); in getStackAddress()

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