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Searched refs:ADDiu (Results 1 – 24 of 24) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsAnalyzeImmediate.cpp35 AddInstr(SeqLs, Inst(ADDiu, Imm & 0xffffULL)); in GetInstSeqLsADDiu()
61 AddInstr(SeqLs, Inst(ADDiu, MaskedImm)); in GetInstSeqLs()
92 if ((Seq.size() < 2) || (Seq[0].Opc != ADDiu) || in ReplaceADDiuSLLWithLUi()
134 ADDiu = Mips::ADDiu; in Analyze()
139 ADDiu = Mips::DADDiu; in Analyze()
H A DMipsInstructionSelector.cpp163 B.buildInstr(Mips::ADDiu, {DestReg}, {Register(Mips::ZERO)}) in materialize32BitImm()
355 MI = BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::ADDiu)) in select()
687 MachineInstr *ADDiu = in select() local
688 BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::ADDiu)) in select()
692 ADDiu->getOperand(2).setTargetFlags(MipsII::MO_ABS_LO); in select()
693 if (!constrainSelectedInstRegOperands(*ADDiu, TII, TRI, RBI)) in select()
706 MachineInstr *ADDiu = in select() local
707 BuildMI(MBB, I, I.getDebugLoc(), TII.get(Mips::ADDiu)) in select()
711 ADDiu->getOperand(2).setTargetFlags(MipsII::MO_ABS_LO); in select()
712 if (!constrainSelectedInstRegOperands(*ADDiu, TII, TRI, RBI)) in select()
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H A DMipsMachineFunction.cpp111 BuildMI(MBB, I, DL, TII.get(Mips::ADDiu), GlobalBaseReg).addReg(V0) in initGlobalBaseReg()
127 BuildMI(MBB, I, DL, TII.get(Mips::ADDiu), GlobalBaseReg).addReg(V1) in initGlobalBaseReg()
H A DMipsAnalyzeImmediate.h60 unsigned ADDiu, ORi, SLL, LUi; variable
H A DMipsBranchExpansion.cpp469 BuildMI(*LongBrMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
530 BuildMI(*BalTgtMBB, std::prev(Pos), DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
538 BuildMI(*BalTgtMBB, Pos, DL, TII->get(Mips::ADDiu), Mips::SP) in expandToLongBranch()
738 BuildMI(MBB, I, DL, TII->get(Mips::ADDiu), Mips::V0) in emitGPDisp()
H A DRelocation.txt65 defm : MipsHiLoRelocs<LUi, ADDiu, ZERO, GPR32Opnd>;
H A DMipsInstrInfo.td124 // target constant nodes that would otherwise remain unchanged with ADDiu
2029 def ADDiu : MMRel, StdMMR6Rel, ArithLogicI<"addiu", simm16_relaxed, GPR32Opnd,
2800 defm : OneOrTwoOperandMacroImmediateAlias<"addu", ADDiu>, ISA_MIPS1;
2879 (ADDiu GPR32Opnd:$rd, GPR32Opnd:$rs,
2881 def : MipsInstAlias<"subu $rs, $imm", (ADDiu GPR32Opnd:$rs, GPR32Opnd:$rs,
3140 defm : MaterializeImms<i32, ZERO, ADDiu, LUi, ORi>, ISA_MIPS1;
3150 (ADDiu GPR32:$src, imm:$imm)>, ISA_MIPS1, ASE_NOT_DSP;
3216 defm : MipsHiLoRelocs<LUi, ADDiu, ZERO, GPR32Opnd>, ISA_MIPS1;
3227 (ADDiu GPR32:$gp, tglobaladdr:$in)>, ISA_MIPS1, ABI_NOT_N64;
3229 (ADDiu GPR32:$gp, tconstpool:$in)>, ISA_MIPS1, ABI_NOT_N64;
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H A DMipsMCInstLower.cpp305 lowerLongBranchADDiu(MI, OutMI, Mips::ADDiu); in lowerLongBranch()
H A DMicroMipsSizeReduction.cpp214 {RT_OneInstr, OpCodes(Mips::ADDiu, Mips::ADDIUR1SP_MM),
216 {RT_OneInstr, OpCodes(Mips::ADDiu, Mips::ADDIUSP_MM), ReduceADDIUToADDIUSP,
H A DMipsSEISelDAGToDAG.cpp88 if ((MI.getOpcode() == Mips::ADDiu) && in replaceUsesWithZeroReg()
146 BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(Mips::ADDiu)) in emitMCountABI()
1154 const unsigned ADDiuOp = Is32BitSplat ? Mips::ADDiu : Mips::DADDiu; in trySelect()
H A DMipsFastISel.cpp364 unsigned Opc = Mips::ADDiu; in materialize32BitInt()
423 emitInst(Mips::ADDiu, TempReg) in materializeGV()
738 emitInst(Mips::ADDiu, RegWithZero).addReg(Mips::ZERO).addImm(0); in emitCmp()
739 emitInst(Mips::ADDiu, RegWithOne).addReg(Mips::ZERO).addImm(1); in emitCmp()
H A DMipsSEFrameLowering.cpp418 unsigned ADDiu = ABI.GetPtrAddiuOp(); in emitPrologue() local
545 BuildMI(MBB, MBBI, dl, TII.get(ADDiu), VR).addReg(ZERO).addImm(MaxAlign); in emitPrologue()
H A DMipsSEInstrInfo.cpp564 unsigned ADDiu = ABI.GetPtrAddiuOp(); in adjustStackPtr() local
571 BuildMI(MBB, I, DL, get(ADDiu), SP).addReg(SP).addImm(Amount); in adjustStackPtr()
H A DMipsInstrInfo.cpp974 case Mips::ADDiu: in isAddImmediate()
H A DMipsAsmPrinter.cpp1195 MCInstBuilder(Mips::ADDiu) in EmitSled()
H A DMipsSEISelLowering.cpp3062 BuildMI(*FBB, FBB->end(), DL, TII->get(Mips::ADDiu), VR2) in emitBPOSGE32()
3068 BuildMI(*TBB, TBB->end(), DL, TII->get(Mips::ADDiu), VR1) in emitBPOSGE32()
3131 BuildMI(*FBB, FBB->end(), DL, TII->get(Mips::ADDiu), RD1) in emitMSACBranchPseudo()
3137 BuildMI(*TBB, TBB->end(), DL, TII->get(Mips::ADDiu), RD2) in emitMSACBranchPseudo()
H A DMipsDSPInstrInfo.td1390 (ValTy (COPY_TO_REGCLASS (ADDiu ZERO, -1), DSPR)),
1398 (ValTy (COPY_TO_REGCLASS (ADDiu ZERO, -1), DSPR))))>;
H A DMipsScheduleP5600.td224 def : InstRW<[P5600WriteEitherALU], (instrs ADD, ADDi, ADDiu, ANDi, ORi, ROTR,
H A DMips64InstrInfo.td910 (ADDiu GPR32:$src, immSExt16:$imm16), sub_32)>;
H A DMipsScheduleGeneric.td47 def : InstRW<[GenericWriteALU], (instrs ADD, ADDi, ADDiu, ADDu, AND, ANDi,
H A DMipsISelLowering.cpp1996 BuildMI(BB, DL, TII->get(ArePtrs64bit ? Mips::DADDiu : Mips::ADDiu), MaskLSB2) in emitAtomicCmpSwapPartword()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsABIInfo.cpp103 return ArePtrs64bit() ? Mips::DADDiu : Mips::ADDiu; in GetPtrAddiuOp()
H A DMipsTargetStreamer.cpp1186 TmpInst.setOpcode(Mips::ADDiu); in emitDirectiveCpLoad()
1267 emitRRX(Mips::ADDiu, GPReg, GPReg, MCOperand::createExpr(LoExpr), SMLoc(), in emitDirectiveCpsetup()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp2615 case Mips::ADDiu: case Mips::ADDiu_MM: in tryExpandInstruction()
2812 TOut.emitRRI(Mips::ADDiu, DstReg, SrcReg, ImmValue, IDLoc, STI); in loadImmediate()
3070 TOut.emitRRX(IsPtr64 ? Mips::DADDiu : Mips::ADDiu, TmpReg, TmpReg, in loadAndAddSymbolAddress()
3137 TOut.emitRRX(IsPtr64 ? Mips::DADDiu : Mips::ADDiu, TmpReg, TmpReg, in loadAndAddSymbolAddress()
3277 TOut.emitRRX(Mips::ADDiu, TmpReg, TmpReg, MCOperand::createExpr(LoExpr), in loadAndAddSymbolAddress()
3551 TOut.emitRRX(isABI_N64() ? Mips::DADDiu : Mips::ADDiu, TmpReg, TmpReg, in expandLoadDoubleImmToGPR()
4372 TOut.emitRRI(Mips::ADDiu, ATReg, ZeroReg, -1, IDLoc, STI); in expandDivRem()
4383 TOut.emitRRI(Mips::ADDiu, ATReg, ZeroReg, 1, IDLoc, STI); in expandDivRem()
4855 case Mips::ADDiu: in expandAliasImmediate()
5484 Opc = isGP64bit() ? Mips::DADDiu : Mips::ADDiu; in expandSeqI()
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