Searched hist:a9372a5fb20597a070d89f9402241d9012c0590f (Results 1 – 6 of 6) sorted by relevance
/linux/arch/arm/mach-mmp/ |
H A D | mmp3.c | a9372a5fb20597a070d89f9402241d9012c0590f Thu May 16 08:19:37 CEST 2019 Lubomir Rintel <lkundrak@v3.sk> ARM: mmp: add support for MMP3 SoC
Similar to MMP2, which this patch is based on. Known differencies from MMP2 are:
* Two PJ4B cores instead of one PJ4 * Tauros 3 L2 cache controller instead of Tauros 2 * A GIC interrupt controller optionally used instead of the MMP one * A TWD local timer * Different USB2 PHY * A USB3 SS controller * More interrupt muxes
Hard to tell what else is different, because documentation is not available.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
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H A D | Makefile | diff a9372a5fb20597a070d89f9402241d9012c0590f Thu May 16 08:19:37 CEST 2019 Lubomir Rintel <lkundrak@v3.sk> ARM: mmp: add support for MMP3 SoC
Similar to MMP2, which this patch is based on. Known differencies from MMP2 are:
* Two PJ4B cores instead of one PJ4 * Tauros 3 L2 cache controller instead of Tauros 2 * A GIC interrupt controller optionally used instead of the MMP one * A TWD local timer * Different USB2 PHY * A USB3 SS controller * More interrupt muxes
Hard to tell what else is different, because documentation is not available.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
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H A D | Kconfig | diff a9372a5fb20597a070d89f9402241d9012c0590f Thu May 16 08:19:37 CEST 2019 Lubomir Rintel <lkundrak@v3.sk> ARM: mmp: add support for MMP3 SoC
Similar to MMP2, which this patch is based on. Known differencies from MMP2 are:
* Two PJ4B cores instead of one PJ4 * Tauros 3 L2 cache controller instead of Tauros 2 * A GIC interrupt controller optionally used instead of the MMP one * A TWD local timer * Different USB2 PHY * A USB3 SS controller * More interrupt muxes
Hard to tell what else is different, because documentation is not available.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
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H A D | time.c | diff a9372a5fb20597a070d89f9402241d9012c0590f Thu May 16 08:19:37 CEST 2019 Lubomir Rintel <lkundrak@v3.sk> ARM: mmp: add support for MMP3 SoC
Similar to MMP2, which this patch is based on. Known differencies from MMP2 are:
* Two PJ4B cores instead of one PJ4 * Tauros 3 L2 cache controller instead of Tauros 2 * A GIC interrupt controller optionally used instead of the MMP one * A TWD local timer * Different USB2 PHY * A USB3 SS controller * More interrupt muxes
Hard to tell what else is different, because documentation is not available.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
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/linux/drivers/clk/mmp/ |
H A D | Makefile | diff a9372a5fb20597a070d89f9402241d9012c0590f Thu May 16 08:19:37 CEST 2019 Lubomir Rintel <lkundrak@v3.sk> ARM: mmp: add support for MMP3 SoC
Similar to MMP2, which this patch is based on. Known differencies from MMP2 are:
* Two PJ4B cores instead of one PJ4 * Tauros 3 L2 cache controller instead of Tauros 2 * A GIC interrupt controller optionally used instead of the MMP one * A TWD local timer * Different USB2 PHY * A USB3 SS controller * More interrupt muxes
Hard to tell what else is different, because documentation is not available.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
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/linux/drivers/clk/ |
H A D | Kconfig | diff a9372a5fb20597a070d89f9402241d9012c0590f Thu May 16 08:19:37 CEST 2019 Lubomir Rintel <lkundrak@v3.sk> ARM: mmp: add support for MMP3 SoC
Similar to MMP2, which this patch is based on. Known differencies from MMP2 are:
* Two PJ4B cores instead of one PJ4 * Tauros 3 L2 cache controller instead of Tauros 2 * A GIC interrupt controller optionally used instead of the MMP one * A TWD local timer * Different USB2 PHY * A USB3 SS controller * More interrupt muxes
Hard to tell what else is different, because documentation is not available.
Signed-off-by: Lubomir Rintel <lkundrak@v3.sk>
|