Searched hist:a1d1e0e3d80a870cc37a6c064994b89e963d2b58 (Results 1 – 4 of 4) sorted by relevance
| /linux/drivers/pinctrl/nuvoton/ |
| H A D | Makefile | diff a1d1e0e3d80a870cc37a6c064994b89e963d2b58 Sat Jan 29 12:52:24 CET 2022 Jonathan Neuschäfer <j.neuschaefer@gmx.net> pinctrl: nuvoton: Add driver for WPCM450
This driver is based on the one for NPCM7xx, because the WPCM450 is a
predecessor of those SoCs. Notable differences:
- On WPCM450, the GPIO registers are not organized in multiple banks,
but rather placed continually into the same register block. This
affects how register offsets are computed.
- Pinmux nodes can explicitly select GPIO mode, whereas in the npcm7xx
driver, this happens automatically when a GPIO is requested.
Some functionality implemented in the hardware was (for now) left unused
in the driver, specifically blinking and pull-up/down.
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reported-by: kernel test robot <lkp@intel.com>
Link: https://lore.kernel.org/r/20220129115228.2257310-6-j.neuschaefer@gmx.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| H A D | Kconfig | diff a1d1e0e3d80a870cc37a6c064994b89e963d2b58 Sat Jan 29 12:52:24 CET 2022 Jonathan Neuschäfer <j.neuschaefer@gmx.net> pinctrl: nuvoton: Add driver for WPCM450
This driver is based on the one for NPCM7xx, because the WPCM450 is a
predecessor of those SoCs. Notable differences:
- On WPCM450, the GPIO registers are not organized in multiple banks,
but rather placed continually into the same register block. This
affects how register offsets are computed.
- Pinmux nodes can explicitly select GPIO mode, whereas in the npcm7xx
driver, this happens automatically when a GPIO is requested.
Some functionality implemented in the hardware was (for now) left unused
in the driver, specifically blinking and pull-up/down.
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reported-by: kernel test robot <lkp@intel.com>
Link: https://lore.kernel.org/r/20220129115228.2257310-6-j.neuschaefer@gmx.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| H A D | pinctrl-wpcm450.c | a1d1e0e3d80a870cc37a6c064994b89e963d2b58 Sat Jan 29 12:52:24 CET 2022 Jonathan Neuschäfer <j.neuschaefer@gmx.net> pinctrl: nuvoton: Add driver for WPCM450
This driver is based on the one for NPCM7xx, because the WPCM450 is a
predecessor of those SoCs. Notable differences:
- On WPCM450, the GPIO registers are not organized in multiple banks,
but rather placed continually into the same register block. This
affects how register offsets are computed.
- Pinmux nodes can explicitly select GPIO mode, whereas in the npcm7xx
driver, this happens automatically when a GPIO is requested.
Some functionality implemented in the hardware was (for now) left unused
in the driver, specifically blinking and pull-up/down.
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reported-by: kernel test robot <lkp@intel.com>
Link: https://lore.kernel.org/r/20220129115228.2257310-6-j.neuschaefer@gmx.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|
| /linux/drivers/pinctrl/ |
| H A D | Makefile | diff a1d1e0e3d80a870cc37a6c064994b89e963d2b58 Sat Jan 29 12:52:24 CET 2022 Jonathan Neuschäfer <j.neuschaefer@gmx.net> pinctrl: nuvoton: Add driver for WPCM450
This driver is based on the one for NPCM7xx, because the WPCM450 is a
predecessor of those SoCs. Notable differences:
- On WPCM450, the GPIO registers are not organized in multiple banks,
but rather placed continually into the same register block. This
affects how register offsets are computed.
- Pinmux nodes can explicitly select GPIO mode, whereas in the npcm7xx
driver, this happens automatically when a GPIO is requested.
Some functionality implemented in the hardware was (for now) left unused
in the driver, specifically blinking and pull-up/down.
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Reported-by: kernel test robot <lkp@intel.com>
Link: https://lore.kernel.org/r/20220129115228.2257310-6-j.neuschaefer@gmx.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
|