1ec8f24b7SThomas Gleixner# SPDX-License-Identifier: GPL-2.0-only 2a1d1e0e3SJonathan Neuschäfer 3a1d1e0e3SJonathan Neuschäferconfig PINCTRL_WPCM450 4a1d1e0e3SJonathan Neuschäfer tristate "Pinctrl and GPIO driver for Nuvoton WPCM450" 5f3244b65SLinus Walleij depends on (ARCH_WPCM450 || COMPILE_TEST) && OF 6a1d1e0e3SJonathan Neuschäfer select PINMUX 7a1d1e0e3SJonathan Neuschäfer select PINCONF 8a1d1e0e3SJonathan Neuschäfer select GENERIC_PINCONF 90bb85088SJonathan Neuschäfer select GENERIC_PINCTRL_GROUPS 10a1d1e0e3SJonathan Neuschäfer select GPIOLIB 11a1d1e0e3SJonathan Neuschäfer select GPIO_GENERIC 12a1d1e0e3SJonathan Neuschäfer select GPIOLIB_IRQCHIP 13f9a5502fSJonathan Neuschäfer select MFD_SYSCON 14a1d1e0e3SJonathan Neuschäfer help 15a1d1e0e3SJonathan Neuschäfer Say Y or M here to enable pin controller and GPIO support for 16a1d1e0e3SJonathan Neuschäfer the Nuvoton WPCM450 SoC. This is strongly recommended when 17a1d1e0e3SJonathan Neuschäfer building a kernel that will run on this chip. 18a1d1e0e3SJonathan Neuschäfer 19a1d1e0e3SJonathan Neuschäfer If this driver is compiled as a module, it will be named 20a1d1e0e3SJonathan Neuschäfer pinctrl-wpcm450. 21a1d1e0e3SJonathan Neuschäfer 223b588e43STomer Maimonconfig PINCTRL_NPCM7XX 233b588e43STomer Maimon bool "Pinctrl and GPIO driver for Nuvoton NPCM7XX" 243b588e43STomer Maimon depends on (ARCH_NPCM7XX || COMPILE_TEST) && OF 253b588e43STomer Maimon select PINMUX 263b588e43STomer Maimon select PINCONF 273b588e43STomer Maimon select GENERIC_PINCONF 283b588e43STomer Maimon select GPIOLIB 293b588e43STomer Maimon select GPIO_GENERIC 303b588e43STomer Maimon select GPIOLIB_IRQCHIP 313b588e43STomer Maimon help 323b588e43STomer Maimon Say Y here to enable pin controller and GPIO support 333b588e43STomer Maimon for Nuvoton NPCM750/730/715/705 SoCs. 34acf4884aSTomer Maimon 35acf4884aSTomer Maimonconfig PINCTRL_NPCM8XX 36acf4884aSTomer Maimon tristate "Pinctrl and GPIO driver for Nuvoton NPCM8XX" 37f3244b65SLinus Walleij depends on (ARCH_NPCM || COMPILE_TEST) && OF 38acf4884aSTomer Maimon select PINMUX 39acf4884aSTomer Maimon select PINCONF 40acf4884aSTomer Maimon select GENERIC_PINCONF 41acf4884aSTomer Maimon select GPIOLIB 42acf4884aSTomer Maimon select GPIO_GENERIC 43acf4884aSTomer Maimon select GPIOLIB_IRQCHIP 44acf4884aSTomer Maimon help 45acf4884aSTomer Maimon Say Y or M here to enable pin controller and GPIO support for 46acf4884aSTomer Maimon the Nuvoton NPCM8XX SoC. This is strongly recommended when 47acf4884aSTomer Maimon building a kernel that will run on this chip. 48*f805e356SJacky Huang 49*f805e356SJacky Huangconfig PINCTRL_MA35 50*f805e356SJacky Huang bool 51*f805e356SJacky Huang depends on (ARCH_MA35 || COMPILE_TEST) && OF 52*f805e356SJacky Huang select GENERIC_PINCTRL_GROUPS 53*f805e356SJacky Huang select GENERIC_PINMUX_FUNCTIONS 54*f805e356SJacky Huang select GENERIC_PINCONF 55*f805e356SJacky Huang select GPIOLIB 56*f805e356SJacky Huang select GPIO_GENERIC 57*f805e356SJacky Huang select GPIOLIB_IRQCHIP 58*f805e356SJacky Huang select MFD_SYSCON 59*f805e356SJacky Huang 60*f805e356SJacky Huangconfig PINCTRL_MA35D1 61*f805e356SJacky Huang bool "Pinctrl and GPIO driver for Nuvoton MA35D1" 62*f805e356SJacky Huang depends on (ARCH_MA35 || COMPILE_TEST) && OF 63*f805e356SJacky Huang select PINCTRL_MA35 64*f805e356SJacky Huang help 65*f805e356SJacky Huang Say Y here to enable pin controller and GPIO support 66*f805e356SJacky Huang for Nuvoton MA35D1 SoC. 67