Searched hist:"8 d786149d78c7784144c7179e25134b6530b714b" (Results 1 – 4 of 4) sorted by relevance
/linux/drivers/pci/controller/ |
H A D | pcie-xilinx-common.h | diff 8d786149d78c7784144c7179e25134b6530b714b Tue Oct 03 19:34:53 CEST 2023 Thippeswamy Havalige <thippeswamy.havalige@amd.com> PCI: xilinx-xdma: Add Xilinx XDMA Root Port driver
Add support for Xilinx XDMA Soft IP core as Root Port.
The Zynq UltraScale+ MPSoCs devices support XDMA soft IP module in programmable logic.
The integrated XDMA Soft IP block has integrated bridge function that can act as PCIe Root Port.
[kwilczynski: correct indentation and whitespaces, Kconfig help update] Link: https://lore.kernel.org/linux-pci/20231003173453.938190-4-thippeswamy.havalige@amd.com Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com> Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@amd.com> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
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H A D | pcie-xilinx-dma-pl.c | 8d786149d78c7784144c7179e25134b6530b714b Tue Oct 03 19:34:53 CEST 2023 Thippeswamy Havalige <thippeswamy.havalige@amd.com> PCI: xilinx-xdma: Add Xilinx XDMA Root Port driver
Add support for Xilinx XDMA Soft IP core as Root Port.
The Zynq UltraScale+ MPSoCs devices support XDMA soft IP module in programmable logic.
The integrated XDMA Soft IP block has integrated bridge function that can act as PCIe Root Port.
[kwilczynski: correct indentation and whitespaces, Kconfig help update] Link: https://lore.kernel.org/linux-pci/20231003173453.938190-4-thippeswamy.havalige@amd.com Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com> Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@amd.com> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
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H A D | Makefile | diff 8d786149d78c7784144c7179e25134b6530b714b Tue Oct 03 19:34:53 CEST 2023 Thippeswamy Havalige <thippeswamy.havalige@amd.com> PCI: xilinx-xdma: Add Xilinx XDMA Root Port driver
Add support for Xilinx XDMA Soft IP core as Root Port.
The Zynq UltraScale+ MPSoCs devices support XDMA soft IP module in programmable logic.
The integrated XDMA Soft IP block has integrated bridge function that can act as PCIe Root Port.
[kwilczynski: correct indentation and whitespaces, Kconfig help update] Link: https://lore.kernel.org/linux-pci/20231003173453.938190-4-thippeswamy.havalige@amd.com Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com> Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@amd.com> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
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H A D | Kconfig | diff 8d786149d78c7784144c7179e25134b6530b714b Tue Oct 03 19:34:53 CEST 2023 Thippeswamy Havalige <thippeswamy.havalige@amd.com> PCI: xilinx-xdma: Add Xilinx XDMA Root Port driver
Add support for Xilinx XDMA Soft IP core as Root Port.
The Zynq UltraScale+ MPSoCs devices support XDMA soft IP module in programmable logic.
The integrated XDMA Soft IP block has integrated bridge function that can act as PCIe Root Port.
[kwilczynski: correct indentation and whitespaces, Kconfig help update] Link: https://lore.kernel.org/linux-pci/20231003173453.938190-4-thippeswamy.havalige@amd.com Signed-off-by: Thippeswamy Havalige <thippeswamy.havalige@amd.com> Signed-off-by: Bharat Kumar Gogada <bharat.kumar.gogada@amd.com> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
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