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/freebsd/sys/contrib/device-tree/src/arm/amlogic/
H A Dmeson6.dtsi51 clocks = <&xtal>, <&clk81>;
52 clock-names = "xtal", "pclk";
56 clocks = <&xtal>, <&clk81>, <&clk81>;
57 clock-names = "xtal", "pclk", "baud";
61 clocks = <&xtal>, <&clk81>, <&clk81>;
62 clock-names = "xtal", "pclk", "baud";
66 clocks = <&xtal>, <&clk81>, <&clk81>;
67 clock-names = "xtal", "pclk", "baud";
71 clocks = <&xtal>, <&clk81>, <&clk81>;
72 clock-names = "xtal", "pclk", "baud";
H A Dmeson8.dtsi256 clocks = <&xtal>;
257 clock-names = "xtal";
581 xtal_32k_out_pins: xtal-32k-out {
584 function = "xtal";
630 clocks = <&xtal>, <&ddr_clkc DDR_CLKID_DDR_PLL>;
631 clock-names = "xtal", "ddr_pll";
718 clocks = <&xtal>, <&clkc CLKID_SAR_ADC>;
727 clocks = <&xtal>,
753 clocks = <&xtal>, <&clkc CLKID_CLK81>;
754 clock-names = "xtal", "pclk";
[all …]
H A Dmeson8b.dtsi233 clocks = <&xtal>;
234 clock-names = "xtal";
591 clocks = <&xtal>, <&ddr_clkc DDR_CLKID_DDR_PLL>;
592 clock-names = "xtal", "ddr_pll";
693 clocks = <&xtal>, <&clkc CLKID_SAR_ADC>;
702 clocks = <&xtal>,
724 clocks = <&xtal>, <&clkc CLKID_CLK81>;
725 clock-names = "xtal", "pclk";
730 clocks = <&xtal>, <&clkc CLKID_CLK81>, <&clkc CLKID_CLK81>;
731 clock-names = "xtal", "pclk", "baud";
[all …]
/freebsd/sys/contrib/device-tree/Bindings/clock/
H A Darmada3700-xtal-clock.txt1 * Xtal Clock bindings for Marvell Armada 37xx SoCs
3 Marvell Armada 37xx SoCs allow to determine the xtal clock frequencies by
12 "marvell,armada-3700-xtal-clock"
17 output names ("xtal")
24 xtalclk: xtal-clk {
25 compatible = "marvell,armada-3700-xtal-clock";
26 clock-output-names = "xtal";
H A Dsilabs,si5351.txt23 handles, shall be xtal reference clock or xtal and clkin for
24 si5351c only. Corresponding clock input names are "xtal" and
46 2 = xtal
78 /* connect xtal input to 25MHz reference */
80 clock-names = "xtal";
82 /* connect xtal input as source of pll0 and pll1 */
119 * - xtal as clock source of output divider
H A Damlogic,gxbb-clkc.txt17 * "xtal": the platform xtal
40 clocks = <&xtal>;
41 clock-names = "xtal";
H A Dmarvell,armada-3700-uart-clock.yaml23 "TBG-A-P", "TBG-B-P", "TBG-A-S", "TBG-B-S", "xtal"
28 used for UART (most probably xtal) for smooth boot log on UART.
36 - const: xtal
57 clock-names = "TBG-A-P", "TBG-B-P", "TBG-A-S", "TBG-B-S", "xtal";
H A Damlogic,gxbb-aoclkc.txt17 * "xtal" : the platform xtal
51 clocks = <&xtal>, <&clkc CLKID_CLK81>;
52 clock-names = "xtal", "mpeg-clk";
H A Dnxp,lpc3220-clk.txt11 "xtal_32k" and may have optional "xtal"
27 clocks = <&xtal_32k>, <&xtal>;
28 clock-names = "xtal_32k", "xtal";
H A Damlogic,meson8-ddr-clkc.yaml26 - const: xtal
45 clocks = <&xtal>;
46 clock-names = "xtal";
H A Dnxp,lpc3220-clk.yaml32 - const: xtal
49 clocks = <&xtal_32k>, <&xtal>;
50 clock-names = "xtal_32k", "xtal";
/freebsd/sys/contrib/device-tree/src/arm64/amlogic/
H A Damlogic-a4-common.dtsi23 xtal: xtal-clk { label
26 clock-output-names = "xtal";
58 clocks = <&xtal>;
66 clocks = <&xtal>, <&xtal>, <&xtal>;
67 clock-names = "xtal", "pclk", "baud";
H A Dmeson-gxbb.dtsi286 clocks = <&xtal>, <&clkc CLKID_CLK81>;
287 clock-names = "xtal", "mpeg-clk";
322 assigned-clock-parents = <&xtal>, <0>;
330 clocks = <&xtal>;
331 clock-names = "xtal";
789 clocks = <&xtal>,
838 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
839 clock-names = "xtal", "pclk", "baud";
843 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
844 clock-names = "xtal", "pclk", "baud";
[all …]
H A Dmeson-gxl.dtsi310 clocks = <&xtal>, <&clkc CLKID_CLK81>;
311 clock-names = "xtal", "mpeg-clk";
334 assigned-clock-parents = <&xtal>, <0>;
342 clocks = <&xtal>;
343 clock-names = "xtal";
859 clocks = <&xtal>,
908 clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>;
909 clock-names = "xtal", "pclk", "baud";
913 clocks = <&xtal>, <&clkc_AO CLKID_AO_UART1>, <&xtal>;
914 clock-names = "xtal", "pclk", "baud";
[all …]
H A Dmeson-a1.dtsi306 <&xtal>;
309 "hifi_pll", "xtal";
328 clocks = <&xtal>, <&xtal>, <&xtal>;
329 clock-names = "xtal", "pclk", "baud";
338 clocks = <&xtal>, <&xtal>, <&xtal>;
339 clock-names = "xtal", "pclk", "baud";
350 clocks = <&xtal>,
395 clock-names = "xtal";
446 assigned-clock-parents = <&xtal>;
526 xtal: xtal-clk { label
[all …]
H A Dmeson-s4.dtsi62 xtal: xtal-clk { label
65 clock-output-names = "xtal";
121 <&xtal>;
125 "mpll2", "mpll3", "hdmi_pll", "xtal";
132 clocks = <&xtal>;
133 clock-names = "xtal";
140 clocks = <&xtal>;
606 <&xtal>,
755 clocks = <&xtal>, <&clkc_periphs CLKID_UART_B>, <&xtal>;
756 clock-names = "xtal", "pclk", "baud";
[all …]
H A Dmeson-g12-common.dtsi220 assigned-clock-parents = <&xtal>, <0>;
1571 clocks = <&xtal>;
1572 clock-names = "xtal";
1599 clocks = <&xtal>;
1600 clock-names = "xtal";
1621 clocks = <&xtal>;
1622 clock-names = "xtal";
1709 <&xtal>,
1754 clocks = <&xtal>, <&clkc CLKID_CLK81>;
1755 clock-names = "xtal", "mpeg-clk";
[all …]
/freebsd/sys/contrib/device-tree/Bindings/serial/
H A Damlogic,meson-uart.yaml70 - description: external xtal clock identifier
72 - description: the source of the baudrate generator, can be either the xtal or the pclk
76 - const: xtal
100 clocks = <&xtal>, <&pclk>, <&xtal>;
101 clock-names = "xtal", "pclk", "baud";
/freebsd/sys/contrib/device-tree/Bindings/timer/
H A Damlogic,meson6-timer.txt8 - clocks : phandles to the pclk (system clock) and XTAL clocks
9 - clock-names : must contain "pclk" and "xtal"
20 clocks = <&xtal>, <&clk81>;
21 clock-names = "xtal", "pclk";
H A Damlogic,meson6-timer.yaml29 - const: xtal
52 clocks = <&xtal>, <&clk81>;
53 clock-names = "xtal", "pclk";
/freebsd/sys/arm/mv/clk/
H A Dperiph_clk_d.c55 * or xtal output) -> gate (enable or disable clock), which is also final node
97 parent_names[0] = device_def->common_def.xtal; in a37x0_periph_d_register_full_clk_dd()
119 * mux (select divided freq. or xtal output) -> gate (enable or disable clock),
153 parent_names[0] = device_def->common_def.xtal; in a37x0_periph_d_register_full_clk()
175 * divider) -> mux (choose divided or xtal output).
206 parent_names[0] = device_def->common_def.xtal; in a37x0_periph_d_register_periph_cpu()
220 * div2 (second frequency divider) -> mux (choose divided or xtal output).
259 parent_names[0] = device_def->common_def.xtal; in a37x0_periph_d_register_mdd()
H A Dperiph_clk_fixed.c54 * fixed clock (output from xtal/2) -> mux (choose fixed or xtal frequency)
72 fixed_def.clkdef.parent_names = &device_def->common_def.xtal; in a37x0_periph_fixed_register_fixed()
80 parent_names[0] = device_def->common_def.xtal; in a37x0_periph_fixed_register_fixed()
/freebsd/sys/contrib/device-tree/Bindings/net/ieee802154/
H A Dat86rf230.txt15 - xtal-trim: u8 value for fine tuning the internal capacitance
16 arrays of xtal pins: 0 = +0 pF, 0xf = +4.5 pF
26 xtal-trim = /bits/ 8 <0x06>;
/freebsd/sys/contrib/device-tree/Bindings/media/
H A Damlogic,meson-ir-tx.yaml38 - const: xtal
58 clocks = <&clkc CLKID_CLK81>, <&xtal>;
59 clock-names = "sysclk", "xtal";
/freebsd/sys/contrib/device-tree/Bindings/net/wireless/
H A Dti,wlcore,spi.txt26 - clock-xtal : boolean, clock is generated from XTAL
42 clock-xtal;

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