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Searched +full:wpcm450 +full:- +full:pinctrl (Results 1 – 8 of 8) sorted by relevance

/linux/arch/arm/boot/dts/nuvoton/
H A Dnuvoton-wpcm450.dtsi1 // SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 #include <dt-bindings/interrupt-controller/irq.h>
7 compatible = "nuvoton,wpcm450";
8 #address-cells = <1>;
9 #size-cells = <1>;
23 #address-cells = <1>;
24 #size-cells = <0>;
27 compatible = "arm,arm926ej-s";
33 clk24m: clock-24mhz {
35 compatible = "fixed-clock";
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H A Dnuvoton-wpcm450-supermicro-x9sci-ln4f.dts1 // SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
4 /dts-v1/;
9 #include "nuvoton-wpcm450.dtsi"
11 #include <dt-bindings/input/linux-event-codes.h>
12 #include <dt-bindings/gpio/gpio.h>
15 model = "Supermicro X9SCi-LN4F BMC";
16 compatible = "supermicro,x9sci-ln4f-bmc", "nuvoton,wpcm450";
24 stdout-path = "serial0:115200n8";
32 gpio-keys {
33 compatible = "gpio-keys";
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/linux/drivers/pinctrl/nuvoton/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
4 tristate "Pinctrl and GPIO driver for Nuvoton WPCM450"
16 the Nuvoton WPCM450 SoC. This is strongly recommended when
20 pinctrl-wpcm450.
23 bool "Pinctrl and GPIO driver for Nuvoton NPCM7XX"
36 tristate "Pinctrl and GPIO driver for Nuvoton NPCM8XX"
61 bool "Pinctrl and GPIO driver for Nuvoton MA35D1"
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 # Nuvoton pinctrl support
4 obj-$(CONFIG_PINCTRL_WPCM450) += pinctrl-wpcm450.o
5 obj-$(CONFIG_PINCTRL_NPCM7XX) += pinctrl-npcm7xx.o
6 obj-$(CONFIG_PINCTRL_NPCM8XX) += pinctrl-npcm8xx.o
7 obj-$(CONFIG_PINCTRL_MA35) += pinctrl-ma35.o
8 obj-$(CONFIG_PINCTRL_MA35D1) += pinctrl-ma35d1.o
H A Dpinctrl-wpcm450.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2016-2018 Nuvoton Technology corporation.
4 // Copyright (c) 2021-2022 Jonathan Neuschäfer
7 // - Pin mux registers, in the GCR (general control registers) block
8 // - GPIO registers, specific to each GPIO bank
9 // - GPIO event (interrupt) registers, located centrally in the GPIO register
23 #include <linux/pinctrl/pinconf.h>
24 #include <linux/pinctrl/pinconf-generic.h>
25 #include <linux/pinctrl/pinctrl.h>
26 #include <linux/pinctrl/pinmux.h>
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/linux/Documentation/devicetree/bindings/pinctrl/
H A Dnuvoton,wpcm450-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/nuvoton,wpcm450-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Nuvoton WPCM450 pin control and GPIO
10 - Jonathan Neuschäfer <j.neuschaefer@gmx.net>
14 const: nuvoton,wpcm450-pinctrl
19 '#address-cells':
22 '#size-cells':
31 "^gpio@[0-7]$":
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/linux/arch/arm/mach-npcm/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
5 select PINCTRL
10 bool "Support for WPCM450 BMC (Hermon)"
16 General support for WPCM450 BMC (Hermon).
18 Winbond/Nuvoton WPCM450 BMC based on the ARM926EJ-S.
/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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