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Searched +full:vt8500 +full:- +full:uart (Results 1 – 9 of 9) sorted by relevance

/linux/arch/arm/boot/dts/vt8500/
H A Dwm8505.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * wm8505.dtsi - Device tree file for Wondermedia WM8505 SoC
9 #address-cells = <1>;
10 #size-cells = <1>;
14 #address-cells = <0>;
15 #size-cells = <0>;
19 compatible = "arm,arm926ej-s";
38 #address-cells = <1>;
39 #size-cells = <1>;
40 compatible = "simple-bus";
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H A Dwm8750.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * wm8750.dtsi - Device tree file for Wondermedia WM8750 SoC
9 #address-cells = <1>;
10 #size-cells = <1>;
14 #address-cells = <0>;
15 #size-cells = <0>;
40 #address-cells = <1>;
41 #size-cells = <1>;
42 compatible = "simple-bus";
44 interrupt-parent = <&intc0>;
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H A Dvt8500.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * vt8500.dtsi - Device tree file for VIA VT8500 SoC
9 #address-cells = <1>;
10 #size-cells = <1>;
11 compatible = "via,vt8500";
14 #address-cells = <0>;
15 #size-cells = <0>;
19 compatible = "arm,arm926ej-s";
36 #address-cells = <1>;
37 #size-cells = <1>;
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H A Dwm8850.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * wm8850.dtsi - Device tree file for Wondermedia WM8850 SoC
9 #address-cells = <1>;
10 #size-cells = <1>;
14 #address-cells = <1>;
15 #size-cells = <0>;
19 compatible = "arm,cortex-a9";
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "simple-bus";
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H A Dwm8650.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * wm8650.dtsi - Device tree file for Wondermedia WM8650 SoC
9 #address-cells = <1>;
10 #size-cells = <1>;
14 #address-cells = <0>;
15 #size-cells = <0>;
19 compatible = "arm,arm926ej-s";
34 #address-cells = <1>;
35 #size-cells = <1>;
36 compatible = "simple-bus";
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/linux/Documentation/devicetree/bindings/serial/
H A Dvia,vt8500-uart.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/serial/via,vt8500-uart.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: VIA VT8500 and WonderMedia WM8xxx UART Controller
11 - Alexey Charkov <alchark@gmail.com>
14 - $ref: serial.yaml
19 - via,vt8500-uart # up to WM8850/WM8950
20 - wm,wm8880-uart # for WM8880 and later
32 - compatible
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/linux/include/uapi/linux/
H A Dserial_core.h1 /* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */
19 #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */
20 #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */
21 #define PORT_AR7 18 /* Texas Instruments AR7 internal UART */
22 #define PORT_U6_16550A 19 /* ST-Ericsson U6xxx internal UART */
23 #define PORT_TEGRA 20 /* NVIDIA Tegra internal UART */
24 #define PORT_XR17D15X 21 /* Exar XR17D15x UART */
25 #define PORT_LPC3220 22 /* NXP LPC32xx SoC "Standard" UART */
29 #define PORT_ALTR_16550_F32 26 /* Altera 16550 UART with 32 FIFOs */
30 #define PORT_ALTR_16550_F64 27 /* Altera 16550 UART with 64 FIFOs */
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/linux/drivers/tty/serial/
H A Dvt8500_serial.c1 // SPDX-License-Identifier: GPL-2.0
28 * UART Register offsets
38 #define VT8500_URUSR 0x001c /* UART status */
74 #define VT8500_CS8 (1 << 2) /* 8-bit data length (vs. 7-bit) */
83 #define VT8500_SWRTSCTS (1 << 11) /* Software-controlled RTS/CTS */
86 * Capability flags (driver-internal)
96 struct uart_port uart; member
106 * have been allocated as we can't use pdev->id in
114 writel(val, port->membase + off); in vt8500_write()
119 return readl(port->membase + off); in vt8500_read()
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/linux/
H A DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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