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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DSwiftErrorValueTracking.cpp37 auto VReg = MF->getRegInfo().createVirtualRegister(RC); in getOrCreateVReg() local
38 VRegDefMap[Key] = VReg; in getOrCreateVReg()
39 VRegUpwardsUse[Key] = VReg; in getOrCreateVReg()
40 return VReg; in getOrCreateVReg()
46 const Value *Val, Register VReg) { in setCurrentVReg() argument
47 VRegDefMap[std::make_pair(MBB, Val)] = VReg; in setCurrentVReg()
59 Register VReg = MF->getRegInfo().createVirtualRegister(RC); in getOrCreateVRegDefAt() local
60 VRegDefUses[Key] = VReg; in getOrCreateVRegDefAt()
61 setCurrentVReg(MBB, Val, VReg); in getOrCreateVRegDefAt()
62 return VReg; in getOrCreateVRegDefAt()
72 Register VReg = getOrCreateVReg(MBB, Val); getOrCreateVRegUseAt() local
133 Register VReg = MF->getRegInfo().createVirtualRegister(RC); createEntriesInEntryBlock() local
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H A DMIRVRegNamerUtils.cpp1 //===---------- MIRVRegNamerUtils.cpp - MIR VReg Renaming Utilities -------===//
19 UseStableNamerHash("mir-vreg-namer-use-stable-hash", cl::init(false),
21 cl::desc("Use Stable Hashing for MIR VReg Renaming"));
49 for (const auto &VReg : VRegs) { in getVRegRenameMap() local
50 const unsigned Reg = VReg.getReg(); in getVRegRenameMap()
51 VRM[Reg] = createVirtualRegisterWithLowerName(Reg, GetUniqueVRegName(VReg)); in getVRegRenameMap()
141 unsigned VRegRenamer::createVirtualRegister(unsigned VReg) { in createVirtualRegister() argument
142 assert(Register::isVirtualRegister(VReg) && "Expected Virtual Registers"); in createVirtualRegister()
143 std::string Name = getInstructionOpcodeHash(*MRI.getVRegDef(VReg)); in createVirtualRegister()
144 return createVirtualRegisterWithLowerName(VReg, Name); in createVirtualRegister()
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H A DMIRVRegNamerUtils.h2 //===------------ MIRVRegNamerUtils.h - MIR VReg Renaming Utilities -------===//
55 /// the instruction defining that vreg.
67 /// Perform replacing of registers based on the <old,new> vreg map.
70 /// createVirtualRegister - Given an existing vreg, create a named vreg to
73 unsigned createVirtualRegister(unsigned VReg);
75 /// Create a vreg with name and return it.
76 unsigned createVirtualRegisterWithLowerName(unsigned VReg, StringRef Name);
79 /// vreg definition based on the semantics of the instruction.
88 /// will be used as prefix for the vreg names.
H A DRegAllocPBQP.cpp161 /// Finds the initial set of vreg intervals to allocate.
167 /// Spill the given VReg.
168 void spillVReg(Register VReg, SmallVectorImpl<Register> &NewIntervals,
333 Register VReg = G.getNodeMetadata(NId).getVReg(); in apply() local
334 LiveInterval &LI = LIS.getInterval(VReg); in apply()
604 Register VReg = Worklist.back(); in initializeGraph() local
607 LiveInterval &VRegLI = LIS.getInterval(VReg); in initializeGraph()
617 const TargetRegisterClass *TRC = MRI.getRegClass(VReg); in initializeGraph()
623 // Compute an initial allowed set for the current vreg. in initializeGraph()
654 spillVReg(VReg, NewVRegs, MF, LIS, VRM, VRegSpiller); in initializeGraph()
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H A DLiveRangeEdit.cpp36 Register VReg = MRI.cloneVirtualRegister(OldReg); in createEmptyIntervalFrom() local
38 VRM->setIsSplitFromReg(VReg, VRM->getOriginal(OldReg)); in createEmptyIntervalFrom()
40 LiveInterval &LI = LIS.createEmptyInterval(VReg); in createEmptyIntervalFrom()
56 Register VReg = MRI.cloneVirtualRegister(OldReg); in createFrom() local
58 VRM->setIsSplitFromReg(VReg, VRM->getOriginal(OldReg)); in createFrom()
67 LIS.getInterval(VReg).markNotSpillable(); in createFrom()
68 return VReg; in createFrom()
453 Register VReg = LI->reg(); in eliminateDeadDefs() local
455 TheDelegate->LRE_WillShrinkVirtReg(VReg); in eliminateDeadDefs()
463 if (llvm::is_contained(RegsBeingSpilled, VReg)) in eliminateDeadDefs()
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/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyMachineFunctionInfo.h39 /// A mapping from CodeGen vreg index to WebAssembly register number.
42 /// A mapping from CodeGen vreg index to a boolean value indicating whether
59 // after it has been replaced by a vreg
98 assert(VarargVreg != -1U && "Vararg vreg hasn't been set"); in getVarargBufferVreg()
104 assert(BasePtrVreg != -1U && "Base ptr vreg hasn't been set"); in getBasePointerVreg()
109 assert(FrameBaseVreg != -1U && "Frame base vreg hasn't been set"); in getFrameBaseVreg()
122 void stackifyVReg(MachineRegisterInfo &MRI, unsigned VReg) { in stackifyVReg() argument
123 assert(MRI.getUniqueVRegDef(VReg)); in stackifyVReg()
124 auto I = Register::virtReg2Index(VReg); in stackifyVReg()
129 void unstackifyVReg(unsigned VReg) { in unstackifyVReg() argument
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H A DWebAssemblyRegNumbering.cpp79 LLVM_DEBUG(dbgs() << "Arg VReg " << MI.getOperand(0).getReg() in runOnMachineFunction()
92 Register VReg = Register::index2VirtReg(VRegIdx); in runOnMachineFunction() local
94 if (MRI.use_empty(VReg)) in runOnMachineFunction()
97 if (MFI.isVRegStackified(VReg)) { in runOnMachineFunction()
98 LLVM_DEBUG(dbgs() << "VReg " << VReg << " -> WAReg " in runOnMachineFunction()
100 MFI.setWAReg(VReg, INT32_MIN | NumStackRegs++); in runOnMachineFunction()
103 if (MFI.getWAReg(VReg) == WebAssembly::UnusedReg) { in runOnMachineFunction()
104 LLVM_DEBUG(dbgs() << "VReg " << VReg << " in runOnMachineFunction()
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H A DWebAssemblyReplacePhysRegs.cpp84 unsigned VReg = WebAssembly::NoRegister; in runOnMachineFunction() local
88 if (VReg == WebAssembly::NoRegister) { in runOnMachineFunction()
89 VReg = MRI.createVirtualRegister(RC); in runOnMachineFunction()
93 FI->setFrameBaseVreg(VReg); in runOnMachineFunction()
95 dbgs() << "replacing preg " << PReg << " with " << VReg << " (" in runOnMachineFunction()
96 << Register::virtReg2Index(VReg) << ")\n"; in runOnMachineFunction()
100 MO.setReg(VReg); in runOnMachineFunction()
/freebsd/lib/libc/arm/aeabi/
H A Daeabi_vfp.h53 #define LOAD_DREG(vreg, reg0, reg1) vmov vreg, reg1, reg0 argument
54 #define UNLOAD_DREG(reg0, reg1, vreg) vmov reg1, reg0, vreg argument
56 #define LOAD_DREG(vreg, reg0, reg1) vmov vreg, reg0, reg1 argument
57 #define UNLOAD_DREG(reg0, reg1, vreg) vmov reg0, reg1, vreg argument
61 #define LOAD_SREG(vreg, reg) vmov vreg, reg argument
62 #define UNLOAD_SREG(reg, vreg) vmov reg, vreg argument
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DInstrEmitter.cpp99 // If the node is only used by a CopyToReg and the dest reg is a vreg, use in EmitCopyFromReg()
100 // the CopyToReg'd destination register instead of creating a new vreg. in EmitCopyFromReg()
202 // is a vreg in the same register class, use the CopyToReg'd destination in CreateVirtualRegisters()
203 // register instead of creating a new vreg. in CreateVirtualRegisters()
277 Register VReg = MRI->createVirtualRegister(RC); in getVR() local
279 TII->get(TargetOpcode::IMPLICIT_DEF), VReg); in getVR()
280 return VReg; in getVR()
327 Register VReg = getVR(Op, VRBaseMap); in AddRegisterOperand() local
335 // shrink VReg's register class within reason. For example, if VReg == GR32 in AddRegisterOperand()
336 // and II requires a GR32_NOSP, just constrain VReg to GR32_NOSP. in AddRegisterOperand()
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H A DSDNodeDbgValue.h37 VREG = 3 ///< Value is a virtual register. enumerator
65 /// Returns the Virtual Register for a VReg
67 assert(kind == VREG); in getVReg()
68 return u.VReg; in getVReg()
77 static SDDbgOperand fromVReg(unsigned VReg) { in fromVReg() argument
78 return SDDbgOperand(VReg, VREG); in fromVReg()
93 case VREG:
110 unsigned VReg; ///< Valid for registers. member
122 assert((Kind == VREG || Kind == FRAMEIX) && in SDDbgOperand()
124 if (kind == VREG) in SDDbgOperand()
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/freebsd/contrib/byacc/test/btyacc/
H A Dcalc1.output9 6 | VREG '=' vexp '\n'
23 18 | VREG
40 VREG shift 3
71 line : VREG . '=' vexp '\n' (6)
72 vexp : VREG . (18)
93 VREG shift 14
109 VREG shift 14
183 line : VREG '=' . vexp '\n' (6)
186 VREG shift 14
203 vexp : VREG . (18)
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H A Dvarsyntax_calc1.output9 6 | VREG '=' vexp '\n'
23 18 | VREG
40 VREG shift 3
71 line : VREG . '=' vexp '\n' (6)
72 vexp : VREG . (18)
93 VREG shift 14
109 VREG shift 14
183 line : VREG '=' . vexp '\n' (6)
186 VREG shift 14
203 vexp : VREG . (18)
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H A Dbtyacc_calc1.output10 7 | VREG '=' vexp
23 18 | VREG
52 VREG shift 4
83 line : VREG . '=' vexp (7)
84 vexp : VREG . (18)
105 VREG shift 15
121 VREG shift 15
200 line : VREG '=' . vexp (7)
203 VREG shift 15
220 vexp : VREG . (18)
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/freebsd/contrib/byacc/test/yacc/
H A Dvarsyntax_calc1.output9 6 | VREG '=' vexp '\n'
23 18 | VREG
40 VREG shift 3
71 line : VREG . '=' vexp '\n' (6)
72 vexp : VREG . (18)
93 VREG shift 14
109 VREG shift 14
183 line : VREG '=' . vexp '\n' (6)
186 VREG shift 14
203 vexp : VREG . (18)
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H A Dcalc1.output9 6 | VREG '=' vexp '\n'
23 18 | VREG
40 VREG shift 3
71 line : VREG . '=' vexp '\n' (6)
72 vexp : VREG . (18)
93 VREG shift 14
109 VREG shift 14
183 line : VREG '=' . vexp '\n' (6)
186 VREG shift 14
203 vexp : VREG . (18)
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/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVGlobalRegistry.h32 // Initialized upon VReg definition in IRTranslator.
273 // and map it to the given VReg by creating an ASSIGN_TYPE instruction.
274 SPIRVType *assignTypeToVReg(const Type *Type, Register VReg,
279 SPIRVType *assignIntTypeToVReg(unsigned BitWidth, Register VReg,
281 SPIRVType *assignFloatTypeToVReg(unsigned BitWidth, Register VReg,
284 Register VReg, MachineInstr &I,
288 // used to map it to the given VReg via an ASSIGN_TYPE instruction.
289 void assignSPIRVTypeToVReg(SPIRVType *Type, Register VReg,
323 // Return the SPIR-V type instruction corresponding to the given VReg, or
328 SPIRVType *getSPIRVTypeForVReg(Register VReg,
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineRegisterInfo.h49 /// registers, including vreg register classes, use/def chains for registers,
75 /// Each element in this list contains the register class of the vreg and the
81 /// Map for recovering vreg name from vreg number.
85 /// StringSet that is used to unique vreg names.
230 bool shouldTrackSubRegLiveness(Register VReg) const { in shouldTrackSubRegLiveness() argument
231 assert(VReg.isVirtual() && "Must pass a VReg"); in shouldTrackSubRegLiveness()
232 const TargetRegisterClass *RC = getRegClassOrNull(VReg); in shouldTrackSubRegLiveness()
765 Register cloneVirtualRegister(Register VReg, StringRef Name = "");
775 /// Set the low-level type of \p VReg to \p Ty.
776 void setType(Register VReg, LLT Ty);
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H A DRegAllocPBQP.h93 /// Holds a vector of the allowed physical regs for a vreg.
148 void setNodeIdForVReg(Register VReg, GraphBase::NodeId NId) { in setNodeIdForVReg() argument
149 VRegToNodeId[VReg.id()] = NId; in setNodeIdForVReg()
152 GraphBase::NodeId getNodeIdForVReg(Register VReg) const { in getNodeIdForVReg() argument
153 auto VRegItr = VRegToNodeId.find(VReg); in getNodeIdForVReg()
187 OptUnsafeEdges(new unsigned[NumOpts]), VReg(Other.VReg), in NodeMetadata()
203 void setVReg(Register VReg) { this->VReg = VReg; } in setVReg() argument
204 Register getVReg() const { return VReg; } in getVReg()
262 Register VReg; variable
/freebsd/contrib/byacc/test/
H A Dvarsyntax_calc1.y26 INTERVAL vreg[26]; variable
34 int ival; // dreg & vreg array index values
39 %token <ival> DREG VREG // indices into dreg, vreg arrays */
70 | VREG '=' vexp '\n'
72 vreg[$1] = $3;
125 | VREG
127 $$ = vreg[$1];
202 return (VREG);
H A Dbtyacc_calc1.y23 INTERVAL vreg[26]; variable
36 %token <ival> DREG VREG /* indices into dreg, vreg arrays */
70 | VREG '=' vexp
72 vreg[$1] = $3;
121 | VREG
123 $$ = vreg[$1];
211 return (VREG); in YYLEX_DECL()
H A Dcalc1.y25 INTERVAL vreg[26]; variable
38 %token <ival> DREG VREG /* indices into dreg, vreg arrays */
68 | VREG '=' vexp '\n'
70 vreg[$1] = $3;
123 | VREG
125 $$ = vreg[$1];
200 return (VREG); in yylex()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DInstructionSelect.cpp253 // that the size of the now-constrained vreg is unchanged and that it has a in runOnMachineFunction()
256 Register VReg = Register::index2VirtReg(I); in runOnMachineFunction() local
259 if (!MRI.def_empty(VReg)) in runOnMachineFunction()
260 MI = &*MRI.def_instr_begin(VReg); in runOnMachineFunction()
261 else if (!MRI.use_empty(VReg)) { in runOnMachineFunction()
262 MI = &*MRI.use_instr_begin(VReg); in runOnMachineFunction()
270 const TargetRegisterClass *RC = MRI.getRegClassOrNull(VReg); in runOnMachineFunction()
273 "VReg has no regclass after selection", *MI); in runOnMachineFunction()
277 const LLT Ty = MRI.getType(VReg); in runOnMachineFunction()
282 "VReg's low-level type and register class have different sizes", *MI); in runOnMachineFunction()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInstrInfoVPseudos.td140 class LMULInfo<int lmul, int oct, VReg regclass, VReg wregclass,
141 VReg f2regclass, VReg f4regclass, VReg f8regclass, string mx> {
143 VReg vrclass = regclass;
144 VReg wvrclass = wregclass;
145 VReg f8vrclass = f8regclass;
146 VReg f4vrclass = f4regclass;
147 VReg f2vrclass = f2regclass;
245 VReg RC = !cast<VReg>("VRN" # nf # !cond(!eq(m.value, V_MF8.value): V_M1.MX,
261 VReg RegClass = M.vrclass;
726 class GetVRegNoV0<VReg VRegClass> {
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/freebsd/share/doc/psd/15.yacc/
H A Dssc155 INTERVAL vreg[ 26 ];
167 %token <ival> DREG VREG /* indices into dreg, vreg arrays */
193 | VREG \'=\' vexp \'\en\'
194 { vreg[$1] = $3; }
227 | VREG
228 { $$ = vreg[$1]; }
270 return( VREG );

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