Lines Matching full:vreg

99   // If the node is only used by a CopyToReg and the dest reg is a vreg, use  in EmitCopyFromReg()
100 // the CopyToReg'd destination register instead of creating a new vreg. in EmitCopyFromReg()
202 // is a vreg in the same register class, use the CopyToReg'd destination in CreateVirtualRegisters()
203 // register instead of creating a new vreg. in CreateVirtualRegisters()
277 Register VReg = MRI->createVirtualRegister(RC); in getVR() local
279 TII->get(TargetOpcode::IMPLICIT_DEF), VReg); in getVR()
280 return VReg; in getVR()
327 Register VReg = getVR(Op, VRBaseMap); in AddRegisterOperand() local
335 // shrink VReg's register class within reason. For example, if VReg == GR32 in AddRegisterOperand()
336 // and II requires a GR32_NOSP, just constrain VReg to GR32_NOSP. in AddRegisterOperand()
351 = MRI->constrainRegClass(VReg, OpRC, MinNumRegs); in AddRegisterOperand()
357 TII->get(TargetOpcode::COPY), NewVReg).addReg(VReg); in AddRegisterOperand()
358 VReg = NewVReg; in AddRegisterOperand()
361 "Constraining an allocatable VReg produced an unallocatable class?"); in AddRegisterOperand()
391 MIB.addReg(VReg, getDefRegState(isOptDef) | getKillRegState(isKill) | in AddRegisterOperand()
412 Register VReg = R->getReg(); in AddOperand() local
424 if (OpRC && IIRC && OpRC != IIRC && VReg.isVirtual()) { in AddOperand()
427 TII->get(TargetOpcode::COPY), NewVReg).addReg(VReg); in AddOperand()
428 VReg = NewVReg; in AddOperand()
434 MIB.addReg(VReg, getImplRegState(Imp)); in AddOperand()
476 Register InstrEmitter::ConstrainForSubReg(Register VReg, unsigned SubIdx, in ConstrainForSubReg() argument
478 const TargetRegisterClass *VRC = MRI->getRegClass(VReg); in ConstrainForSubReg()
481 // RC is a sub-class of VRC that supports SubIdx. Try to constrain VReg in ConstrainForSubReg()
484 RC = MRI->constrainRegClass(VReg, RC, MinRCSize); in ConstrainForSubReg()
486 // VReg has been adjusted. It can be used with SubIdx operands now. in ConstrainForSubReg()
488 return VReg; in ConstrainForSubReg()
490 // VReg couldn't be reasonably constrained. Emit a COPY to a new virtual in ConstrainForSubReg()
496 .addReg(VReg); in ConstrainForSubReg()
508 // If the node is only used by a CopyToReg and the dest reg is a vreg, use in EmitSubregNode()
509 // the CopyToReg'd destination register instead of creating a new vreg. in EmitSubregNode()
638 unsigned VReg = getVR(Node->getOperand(0), VRBaseMap); in EmitCopyToRegClassNode() local
640 // Create the new VReg in the destination class and emit a copy. in EmitCopyToRegClassNode()
646 NewVReg).addReg(VReg); in EmitCopyToRegClassNode()
677 // Skip physical registers as they don't have a vreg to get and we'll in EmitRegSequence()
764 case SDDbgOperand::VREG: in AddDbgValueLocationOps()
827 // defines a VReg, it can depend for example on the order blocks are in EmitDbgInstrRef()
833 // i.e., point the instruction at the vreg, and patch it up later in in EmitDbgInstrRef()
835 auto AddVRegOp = [&](unsigned VReg) { in EmitDbgInstrRef() argument
837 /* Reg */ VReg, /* isDef */ false, /* isImp */ false, in EmitDbgInstrRef()
848 unsigned VReg; in EmitDbgInstrRef() local
850 if (DbgOperand.getKind() == SDDbgOperand::VREG) { in EmitDbgInstrRef()
851 VReg = DbgOperand.getVReg(); in EmitDbgInstrRef()
853 // No definition means that block hasn't been emitted yet. Leave a vreg in EmitDbgInstrRef()
855 if (!MRI->hasOneDef(VReg)) { in EmitDbgInstrRef()
856 AddVRegOp(VReg); in EmitDbgInstrRef()
860 DefMI = &*MRI->def_instr_begin(VReg); in EmitDbgInstrRef()
862 // Look up the corresponding VReg for the given SDNode, if any. in EmitDbgInstrRef()
866 // No VReg -> produce a DBG_VALUE $noreg instead. in EmitDbgInstrRef()
871 VReg = getVR(Op, VRBaseMap); in EmitDbgInstrRef()
873 // Again, if there's no instruction defining the VReg right now, fix it up in EmitDbgInstrRef()
875 if (!MRI->hasOneDef(VReg)) { in EmitDbgInstrRef()
876 AddVRegOp(VReg); in EmitDbgInstrRef()
880 DefMI = &*MRI->def_instr_begin(VReg); in EmitDbgInstrRef()
891 AddVRegOp(VReg); in EmitDbgInstrRef()
895 // Find the operand number which defines the specified VReg. in EmitDbgInstrRef()
898 if (MO.isReg() && MO.isDef() && MO.getReg() == VReg) in EmitDbgInstrRef()
1225 Register VReg = getVR(GluedNode->getOperand(0), VRBaseMap); in EmitMachineNode() local
1226 MachineOperand MO = MachineOperand::CreateReg(VReg, /*isDef=*/false, in EmitMachineNode()
1257 // Instead building a COPY to that vreg destination, build an in EmitSpecialNode()