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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6q-apalis-eval.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright 2014-2022 Toradex
8 /dts-v1/;
10 #include "imx6q-apalis-eval.dtsi"
14 compatible = "toradex,apalis_imx6q-eval", "toradex,apalis_imx6q",
17 reg_pcie_switch: regulator-pcie-switch {
18 compatible = "regulator-fixed";
19 enable-active-high;
21 regulator-max-microvolt = <1800000>;
22 regulator-min-microvolt = <1800000>;
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H A Dimx6qdl-phytec-mira.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
14 compatible = "pwm-backlight";
15 brightness-levels = <0 4 8 16 32 64 128 255>;
16 default-brightness-level = <7>;
17 power-supply = <&reg_backlight>;
23 compatible = "gpio-leds";
24 pinctrl-names = "default";
25 pinctrl-0 = <&pinctrl_gpioleds>;
28 led-red {
29 label = "phyboard-mira:red";
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H A Dimx6-logicpd-baseboard.dtsi1 // SPDX-License-Identifier: GPL-2.0
7 compatible = "gpio-keys";
9 button-0 {
13 debounce-interval = <10>;
14 wakeup-source;
17 button-1 {
21 debounce-interval = <10>;
22 wakeup-source;
25 button-2 {
29 debounce-interval = <10>;
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H A Dimx6qdl-mba6.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright 2013-2021 TQ-Systems GmbH
6 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
9 #include <dt-bindings/clock/imx6qdl-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/sound/fsl-imx-audmux.h>
18 /delete-property/ mmc2;
19 /delete-property/ mmc3;
24 stdout-path = &uart2;
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H A Dimx6dl-yapp4-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 // Copyright (C) 2015-2018 Y Soft Corporation, a.s.
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/leds/common.h>
9 #include <dt-bindings/pwm/pwm.h>
20 compatible = "pwm-backlight";
22 brightness-levels = <0 32 64 128 255>;
23 default-brightness-level = <32>;
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H A Dimx6sx-sdb.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 /dts-v1/;
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
13 compatible = "fsl,imx6sx-sdb", "fsl,imx6sx";
16 stdout-path = &uart1;
24 backlight_display: backlight-display {
25 compatible = "pwm-backlight";
27 brightness-levels = <0 4 8 16 32 64 128 255>;
28 default-brightness-level = <6>;
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H A Dimx6q-cm-fx6.dts6 * This file is dual-licensed: you can use it either under the terms
44 /dts-v1/;
45 #include <dt-bindings/gpio/gpio.h>
46 #include <dt-bindings/sound/fsl-imx-audmux.h>
50 model = "CompuLab CM-FX6";
51 compatible = "compulab,cm-fx6", "fsl,imx6q";
59 compatible = "gpio-leds";
61 heartbeat-led {
64 linux,default-trigger = "heartbeat";
69 pinctrl-names = "default";
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H A Dimx6qdl-sabresd.dtsi1 // SPDX-License-Identifier: GPL-2.0+
6 #include <dt-bindings/clock/imx6qdl-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
12 stdout-path = &uart1;
20 reg_usb_otg_vbus: regulator-usb-otg-vbus {
21 compatible = "regulator-fixed";
22 regulator-name = "usb_otg_vbus";
23 regulator-min-microvolt = <5000000>;
24 regulator-max-microvolt = <5000000>;
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H A Dimx6q-novena.dts2 * Copyright 2015 Sutajio Ko-Usagi PTE LTD
4 * This file is dual-licensed: you can use it either under the terms
22 * MA 02110-1301 USA
49 /dts-v1/;
51 #include <dt-bindings/gpio/gpio.h>
52 #include <dt-bindings/input/input.h>
56 compatible = "kosagi,imx6q-novena", "fsl,imx6q";
65 stdout-path = &uart2;
69 compatible = "pwm-backlight";
71 pinctrl-names = "default";
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/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mm-verdin-dahlia.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 sound_card: sound-card {
8 compatible = "simple-audio-card";
9 simple-audio-card,bitclock-master = <&dailink_master>;
10 simple-audio-card,format = "i2s";
11 simple-audio-card,frame-master = <&dailink_master>;
12 simple-audio-card,mclk-fs = <256>;
13 simple-audio-card,name = "verdin-wm8904";
14 simple-audio-card,routing =
21 simple-audio-card,widgets =
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H A Dimx95-19x19-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/pwm/pwm.h>
13 compatible = "fsl,imx95-19x19-evk", "fsl,imx95";
21 bt_sco_codec: audio-codec-bt-sco {
22 #sound-dai-cells = <1>;
23 compatible = "linux,bt-sco";
27 stdout-path = &lpuart1;
35 fan0: pwm-fan {
36 compatible = "pwm-fan";
[all …]
H A Dimx8mp-verdin-dahlia.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 native-hdmi-connector {
8 compatible = "hdmi-connector";
14 remote-endpoint = <&hdmi_tx_out>;
20 compatible = "simple-audio-card";
21 simple-audio-card,bitclock-master = <&codec_dai>;
22 simple-audio-card,format = "i2s";
23 simple-audio-card,frame-master = <&codec_dai>;
24 simple-audio-card,mclk-fs = <256>;
25 simple-audio-card,name = "verdin-wm8904";
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H A Dimx8mm-beacon-baseboard.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 dmic_codec: dmic-codec {
11 compatible = "dmic-codec";
12 num-channels = <1>;
13 #sound-dai-cells = <0>;
17 compatible = "gpio-leds";
22 default-state = "off";
28 default-state = "off";
34 default-state = "off";
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H A Dimx8mp-phyboard-pollux-rdk.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
9 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 #include <dt-bindings/leds/leds-pca9532.h>
11 #include <dt-bindings/pwm/pwm.h>
12 #include "imx8mp-phycore-som.dtsi"
15 model = "PHYTEC phyBOARD-Pollux i.MX8MP";
16 compatible = "phytec,imx8mp-phyboard-pollux-rdk",
17 "phytec,imx8mp-phycore-som", "fsl,imx8mp";
20 stdout-path = &uart1;
[all …]
H A Dimx8mq-evk.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Copyright (C) 2017-2018 Pengutronix, Lucas Stach <kernel@pengutronix.de>
7 /dts-v1/;
13 compatible = "fsl,imx8mq-evk", "fsl,imx8mq";
16 stdout-path = &uart1;
24 pcie0_refclk: pcie0-refclk {
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
27 clock-frequency = <100000000>;
30 reg_pcie1: regulator-pcie {
[all …]
H A Dimx8mm-evk.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
9 #include <dt-bindings/usb/pd.h>
14 stdout-path = &uart2;
22 hdmi-connector {
23 compatible = "hdmi-connector";
29 remote-endpoint = <&adv7535_out>;
35 compatible = "gpio-leds";
36 pinctrl-names = "default";
[all …]
H A Dimx8mp-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
13 compatible = "fsl,imx8mp-evk", "fsl,imx8mp";
16 stdout-path = &uart2;
19 backlight_lvds: backlight-lvds {
20 compatible = "pwm-backlight";
22 brightness-levels = <0 100>;
23 num-interpolated-steps = <100>;
24 default-brightness-level = <100>;
[all …]
/linux/Documentation/devicetree/bindings/pci/
H A Dhisilicon-histb-pcie.txt6 Documentation/devicetree/bindings/pci/snps,dw-pcie.yaml.
11 - compatible: Should be one of the following strings:
12 "hisilicon,hi3798cv200-pcie"
13 - reg: Should contain sysctl, rc_dbi, config registers location and length.
14 - reg-names: Must include the following entries:
16 "rc-dbi": configuration space of PCIe controller;
18 - bus-range: PCI bus numbers covered.
19 - interrupts: MSI interrupt.
20 - interrupt-names: Must include "msi" entries.
21 - clocks: List of phandle and clock specifier pairs as listed in clock-names
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H A Dfsl,imx6q-pcie-common.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/fsl,imx6q-pcie-common.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lucas Stach <l.stach@pengutronix.de>
11 - Richard Zhu <hongxing.zhu@nxp.com>
22 clock-names:
26 num-lanes:
29 fsl,imx7d-pcie-phy:
31 description: A phandle to an fsl,imx7d-pcie-phy node. Additional
[all …]
/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi3798cv200-poplar.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
12 #include "poplar-pinctrl.dtsi"
16 compatible = "hisilicon,hi3798cv200-poplar", "hisilicon,hi3798cv200";
24 stdout-path = "serial0:115200n8";
33 compatible = "gpio-leds";
35 user-led0 {
38 linux,default-trigger = "heartbeat";
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/linux/drivers/pci/controller/
H A Dpcie-rockchip-host.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Author: Shawn Lin <shawn.lin@rock-chips.com>
8 * Wenrui Li <wenrui.li@rock-chips.com>
37 #include "pcie-rockchip.h"
76 if (pci_is_root_bus(bus) || pci_is_root_bus(bus->parent)) in rockchip_pcie_valid_device()
87 if (rockchip->legacy_phy) in rockchip_pcie_lane_map()
88 return GENMASK(MAX_LANE_NUM - 1, 0); in rockchip_pcie_lane_map()
93 /* The link may be using a reverse-indexed mapping. */ in rockchip_pcie_lane_map()
105 addr = rockchip->apb_base + PCIE_RC_CONFIG_NORMAL_BASE + where; in rockchip_pcie_rd_own_conf()
132 addr = rockchip->apb_base + PCIE_RC_CONFIG_NORMAL_BASE + offset; in rockchip_pcie_wr_own_conf()
[all …]