Searched +full:vf610 +full:- +full:pit (Results 1 – 3 of 3) sorted by relevance
| /linux/Documentation/devicetree/bindings/timer/ |
| H A D | fsl,vf610-pit.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/timer/fsl,vf610-pit.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale Periodic Interrupt Timer (PIT)
10 - Frank Li <Frank.Li@nxp.com>
13 The PIT module is an array of timers that can be used to raise interrupts
19 - enum:
20 - fsl,vf610-pit
21 - nxp,s32g2-pit
[all …]
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| /linux/arch/arm/mach-imx/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
14 Support for Freescale MXC/iMX-based family of processors
88 comment "Cortex-A platforms"
185 comment "Cortex-A/Cortex-M asymmetric multiprocessing platforms"
224 bool "Vybrid Family VF610 support"
228 This enables support for Freescale Vybrid VF610 processor.
244 bool "Use PIT timer"
247 Use SoC Periodic Interrupt Timer (PIT) as clocksource
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| /linux/drivers/clk/imx/ |
| H A D | clk-vf610.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2012-2013 Freescale Semiconductor, Inc.
10 #include <dt-bindings/clock/vf610-clock.h>
203 np = of_find_compatible_node(NULL, NULL, "fsl,vf610-anatop"); in vf610_clocks_init()
317 clk[VF610_CLK_PIT] = imx_clk_gate2("pit", "ipg_bus", CCM_CCGR1, CCM_CCGRx_CGn(7)); in vf610_clocks_init()
444 clk[VF610_CLK_SNVS] = imx_clk_gate2("snvs-rtc", "ipg_bus", CCM_CCGR6, CCM_CCGRx_CGn(7)); in vf610_clocks_init()
476 CLK_OF_DECLARE(vf610, "fsl,vf610-ccm", vf610_clocks_init);
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