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/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Darm,nvic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/arm,nvic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM Nested Vector Interrupt Controller (NVIC)
10 - Rob Herring <robh@kernel.org>
13 The NVIC provides an interrupt controller that is tightly coupled to Cortex-M
14 based processor cores. The NVIC implemented on different SoCs vary in the
20 - arm,armv7m-nvic # deprecated
21 - arm,v6m-nvic
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/linux/drivers/irqchip/
H A Dirq-nvic.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/irq/irq-nvic.c
9 * ARMv7-M CPUs (Cortex-M3/M4)
24 #include <asm/v7m.h>
36 #define NVIC_MAX_IRQ ((NVIC_MAX_BANKS - 1) * 32 + 16)
43 irq_hw_number_t hwirq = (icsr & V7M_SCB_ICSR_VECTACTIVE) - 16; in nvic_handle_irq()
85 pr_warn("unable to map nvic registers\n"); in nvic_of_init()
86 return -ENOMEM; in nvic_of_init()
99 return -ENOMEM; in nvic_of_init()
116 gc->reg_base = nvic_base + 4 * i; in nvic_of_init()
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