| H A D | imx.c | 47 #define USR2 0x98 /* Status Register 2 */ macro 351 * all FIFOs and register USR1, USR2, UBIR, UBMR, UBRC, URXD, UTXD in imx_uart_soft_reset() 354 * We don't need to restore the old values from USR1, USR2, URXD and in imx_uart_soft_reset() 415 u32 ucr1, ucr4, usr2; in imx_uart_stop_tx() local 431 usr2 = imx_uart_readl(sport, USR2); in imx_uart_stop_tx() 432 if ((!(usr2 & USR2_TXDC)) && (ucr4 & UCR4_TCEN)) { in imx_uart_stop_tx() 829 static void imx_uart_check_flood(struct imx_port *sport, u32 usr2) in imx_uart_check_flood() argument 854 if (usr2 & USR2_WAKE) { in imx_uart_check_flood() 855 imx_uart_writel(sport, USR2_WAKE, USR2); in imx_uart_check_flood() 868 u32 usr2, rx; __imx_uart_rxint() local 947 unsigned usr2 = imx_uart_readl(sport, USR2); imx_uart_get_hwmctrl() local 995 unsigned int usr1, usr2, ucr1, ucr2, ucr3, ucr4; imx_uart_int() local 1310 u32 usr1, usr2; imx_uart_clear_rx_errors() local 2115 unsigned int ucr1, usr2; imx_uart_console_write_atomic() local 2156 unsigned int ucr1, usr2; imx_uart_console_write_thread() local [all...] |