47 #define USR2  0x98 /* Status Register 2 */  macro
348 	 * all FIFOs and register USR1, USR2, UBIR, UBMR, UBRC, URXD, UTXD  in imx_uart_soft_reset()
351 	 * We don't need to restore the old values from USR1, USR2, URXD and  in imx_uart_soft_reset()
411 	u32 ucr1, ucr4, usr2;  in imx_uart_stop_tx()  local
427 	usr2 = imx_uart_readl(sport, USR2);  in imx_uart_stop_tx()
428 	if ((!(usr2 & USR2_TXDC)) && (ucr4 & UCR4_TCEN)) {  in imx_uart_stop_tx()
822 static void imx_uart_check_flood(struct imx_port *sport, u32 usr2)  in imx_uart_check_flood()  argument
847 	if (usr2 & USR2_WAKE) {  in imx_uart_check_flood()
848 		imx_uart_writel(sport, USR2_WAKE, USR2);  in imx_uart_check_flood()
860 	u32 usr2, rx;  in __imx_uart_rxint()  local
863 	usr2 = imx_uart_readl(sport, USR2);  in __imx_uart_rxint()
864 	if (usr2 & USR2_RDR)  in __imx_uart_rxint()
865 		imx_uart_check_flood(sport, usr2);  in __imx_uart_rxint()
938 	unsigned usr2 = imx_uart_readl(sport, USR2);  in imx_uart_get_hwmctrl()  local
944 	if (!(usr2 & USR2_DCDIN))  in imx_uart_get_hwmctrl()
948 		if (!(imx_uart_readl(sport, USR2) & USR2_RIIN))  in imx_uart_get_hwmctrl()
984 	unsigned int usr1, usr2, ucr1, ucr2, ucr3, ucr4;  in imx_uart_int()  local
990 	usr2 = imx_uart_readl(sport, USR2);  in imx_uart_int()
1011 		usr2 &= ~USR2_TXDC;  in imx_uart_int()
1019 		usr2 &= ~USR2_ORE;  in imx_uart_int()
1028 	if ((usr1 & USR1_TRDY) || (usr2 & USR2_TXDC)) {  in imx_uart_int()
1051 	if (usr2 & USR2_ORE) {  in imx_uart_int()
1053 		imx_uart_writel(sport, USR2_ORE, USR2);  in imx_uart_int()
1070 	ret = (imx_uart_readl(sport, USR2) & USR2_TXDC) ?  TIOCSER_TEMT : 0;  in imx_uart_tx_empty()
1226 		imx_uart_check_flood(sport, imx_uart_readl(sport, USR2));  in imx_uart_dma_rx_callback()
1298 	u32 usr1, usr2;  in imx_uart_clear_rx_errors()  local
1301 	usr2 = imx_uart_readl(sport, USR2);  in imx_uart_clear_rx_errors()
1303 	if (usr2 & USR2_BRCD) {  in imx_uart_clear_rx_errors()
1305 		imx_uart_writel(sport, USR2_BRCD, USR2);  in imx_uart_clear_rx_errors()
1320 	if (usr2 & USR2_ORE) {  in imx_uart_clear_rx_errors()
1322 		imx_uart_writel(sport, USR2_ORE, USR2);  in imx_uart_clear_rx_errors()
1501 	imx_uart_writel(sport, USR2_ORE, USR2);  in imx_uart_startup()
1977 	if (!(imx_uart_readl(sport, USR2) & USR2_RDR))  in imx_uart_poll_get_char()
1998 		status = imx_uart_readl(sport, USR2);  in imx_uart_poll_put_char()
2083 	unsigned int ucr1, usr2;  in imx_uart_console_write()  local
2114 	read_poll_timeout_atomic(imx_uart_readl, usr2, usr2 & USR2_TXDC,  in imx_uart_console_write()
2115 				 0, USEC_PER_SEC, false, sport, USR2);  in imx_uart_console_write()