| /linux/Documentation/devicetree/bindings/mmc/ |
| H A D | socionext,uniphier-sd.yaml | 58 socionext,syscon-uhs-mode:
62 - description: phandle to syscon that configures UHS mode
65 A phandle to syscon with one argument that configures UHS mode.
104 pinctrl-names = "default", "uhs";
114 sd-uhs-sdr12;
115 sd-uhs-sdr25;
116 sd-uhs-sdr50;
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| H A D | cdns,sdhci.yaml | 51 cdns,phy-input-delay-sd-uhs-sdr12:
52 description: Value of the delay in the input path for SD UHS SDR12 timing
57 cdns,phy-input-delay-sd-uhs-sdr25:
58 description: Value of the delay in the input path for SD UHS SDR25 timing
63 cdns,phy-input-delay-sd-uhs-sdr50:
64 description: Value of the delay in the input path for SD UHS SDR50 timing
69 cdns,phy-input-delay-sd-uhs-ddr50:
70 description: Value of the delay in the input path for SD UHS DDR50 timing
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| H A D | mmc-controller.yaml | 140 sd-uhs-sdr12:
143 SD UHS SDR12 speed is supported.
145 sd-uhs-sdr25:
148 SD UHS SDR25 speed is supported.
150 sd-uhs-sdr50:
153 SD UHS SDR50 speed is supported.
155 sd-uhs-sdr104:
158 SD UHS SDR104 speed is supported.
160 sd-uhs-ddr50:
163 SD UHS DDR50 speed is supported.
[all …]
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| H A D | sdhci-st.txt | 51 - sd-uhs-sdr50: To enable the SDR50 in the mmcss.
54 - sd-uhs-sdr104: To enable the SDR104 in the mmcss.
57 - sd-uhs-ddr50: To enable the DDR50 in the mmcss.
107 sd-uhs-sdr50;
108 sd-uhs-sdr104;
109 sd-uhs-ddr50;
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| H A D | sdhci-am654.yaml | 80 description: Output tap delay for SD UHS SDR12 timing
86 description: Output tap delay for SD UHS SDR25 timing
92 description: Output tap delay for SD UHS SDR50 timing
98 description: Output tap delay for SD UHS SDR104 timing
104 description: Output tap delay for SD UHS DDR50 timing
150 description: Input tap delay for SD UHS SDR12 timing
156 description: Input tap delay for SD UHS SDR25 timing
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| H A D | brcm,sdhci-brcmstb.yaml | 92 sd-uhs-sdr50;
93 sd-uhs-ddr50;
94 sd-uhs-sdr104;
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| /linux/arch/arm64/boot/dts/amlogic/ |
| H A D | meson-g12b-dreambox-two.dts | 16 sd-uhs-sdr12;
17 sd-uhs-sdr25;
18 sd-uhs-sdr50;
19 sd-uhs-sdr104;
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| /linux/arch/arm64/boot/dts/sprd/ |
| H A D | ums512-1h10.dts | 45 sprd,phy-delay-sd-uhs-sdr104 = <0x7f 0x73 0x72 0x72>;
46 sprd,phy-delay-sd-uhs-sdr50 = <0x6e 0x7f 0x01 0x01>;
49 sd-uhs-sdr104;
50 sd-uhs-sdr50;
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| /linux/arch/arm64/boot/dts/freescale/ |
| H A D | tqmls10xxa.dtsi | 54 sd-uhs-sdr104;
55 sd-uhs-sdr50;
56 sd-uhs-sdr25;
57 sd-uhs-sdr12;
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| H A D | fsl-ls1012a-rdb.dts | 29 sd-uhs-sdr104;
30 sd-uhs-sdr50;
31 sd-uhs-sdr25;
32 sd-uhs-sdr12;
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| H A D | fsl-lx2160a-clearfog-itx.dtsi | 92 sd-uhs-sdr104;
93 sd-uhs-sdr50;
94 sd-uhs-sdr25;
95 sd-uhs-sdr12;
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| H A D | fsl-ls1046a-rdb.dts | 41 sd-uhs-sdr104;
42 sd-uhs-sdr50;
43 sd-uhs-sdr25;
44 sd-uhs-sdr12;
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| H A D | fsl-lx2160a-rdb.dts | 130 sd-uhs-sdr104;
131 sd-uhs-sdr50;
132 sd-uhs-sdr25;
133 sd-uhs-sdr12;
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| /linux/arch/riscv/boot/dts/microchip/ |
| H A D | mpfs-polarberry.dts | 68 sd-uhs-sdr12;
69 sd-uhs-sdr25;
70 sd-uhs-sdr50;
71 sd-uhs-sdr104;
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| H A D | mpfs-sev-kit.dts | 101 sd-uhs-sdr12;
102 sd-uhs-sdr25;
103 sd-uhs-sdr50;
104 sd-uhs-sdr104;
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| H A D | mpfs-m100pfsevp.dts | 117 sd-uhs-sdr12;
118 sd-uhs-sdr25;
119 sd-uhs-sdr50;
120 sd-uhs-sdr104;
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| H A D | mpfs-beaglev-fire.dts | 167 sd-uhs-sdr12;
168 sd-uhs-sdr25;
169 sd-uhs-sdr50;
170 sd-uhs-sdr104;
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| /linux/arch/arm64/boot/dts/rockchip/ |
| H A D | px30-firefly-jd4-core-mb.dts | 132 sd-uhs-sdr12;
133 sd-uhs-sdr25;
134 sd-uhs-sdr50;
135 sd-uhs-sdr104;
147 sd-uhs-sdr104;
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| /linux/arch/arm/boot/dts/rockchip/ |
| H A D | rk3288-veyron-sdmmc.dtsi | 89 sd-uhs-sdr12;
90 sd-uhs-sdr25;
91 sd-uhs-sdr50;
92 sd-uhs-sdr104;
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| /linux/arch/arm/boot/dts/st/ |
| H A D | stih410-b2120.dts | 39 sd-uhs-sdr50;
40 sd-uhs-sdr104;
41 sd-uhs-ddr50;
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| H A D | stih418-b2199.dts | 92 sd-uhs-sdr50;
93 sd-uhs-sdr104;
94 sd-uhs-ddr50;
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| /linux/arch/arm64/boot/dts/broadcom/ |
| H A D | bcm2712-rpi-5-b.dts | 61 sd-uhs-sdr50;
62 sd-uhs-ddr50;
63 sd-uhs-sdr104;
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| /linux/drivers/mmc/host/ |
| H A D | sdhci-st.c | 257 unsigned int uhs) in sdhci_st_set_uhs_signaling() argument
266 switch (uhs) { in sdhci_st_set_uhs_signaling()
268 * Set V18_EN -- UHS modes do not work without this. in sdhci_st_set_uhs_signaling()
300 "(uhs %d)\n", uhs); in sdhci_st_set_uhs_signaling()
302 dev_dbg(mmc_dev(host->mmc), "uhs %d, ctrl_2 %04X\n", uhs, ctrl_2); in sdhci_st_set_uhs_signaling()
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| H A D | sdhci-pxav3.c | 238 static void pxav3_set_uhs_signaling(struct sdhci_host *host, unsigned int uhs) in pxav3_set_uhs_signaling() argument
245 * Set V18_EN -- UHS modes do not work without this. in pxav3_set_uhs_signaling()
252 switch (uhs) { in pxav3_set_uhs_signaling()
278 if (uhs == MMC_TIMING_UHS_SDR50 || in pxav3_set_uhs_signaling()
279 uhs == MMC_TIMING_UHS_DDR50) { in pxav3_set_uhs_signaling()
282 } else if (uhs == MMC_TIMING_MMC_HS) { in pxav3_set_uhs_signaling()
294 "%s uhs = %d, ctrl_2 = %04X\n", in pxav3_set_uhs_signaling()
295 __func__, uhs, ctrl_2); in pxav3_set_uhs_signaling()
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| /linux/drivers/mmc/core/ |
| H A D | host.c | 244 mmc_of_parse_timing_phase(dev, "clk-phase-uhs-sdr12", in mmc_of_parse_clk_phase()
246 mmc_of_parse_timing_phase(dev, "clk-phase-uhs-sdr25", in mmc_of_parse_clk_phase()
248 mmc_of_parse_timing_phase(dev, "clk-phase-uhs-sdr50", in mmc_of_parse_clk_phase()
250 mmc_of_parse_timing_phase(dev, "clk-phase-uhs-sdr104", in mmc_of_parse_clk_phase()
252 mmc_of_parse_timing_phase(dev, "clk-phase-uhs-ddr50", in mmc_of_parse_clk_phase()
359 if (device_property_read_bool(dev, "sd-uhs-sdr12")) in mmc_of_parse()
361 if (device_property_read_bool(dev, "sd-uhs-sdr25")) in mmc_of_parse()
363 if (device_property_read_bool(dev, "sd-uhs-sdr50")) in mmc_of_parse()
365 if (device_property_read_bool(dev, "sd-uhs-sdr104")) in mmc_of_parse()
367 if (device_property_read_bool(dev, "sd-uhs-ddr50")) in mmc_of_parse()
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