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/linux/Documentation/devicetree/bindings/ufs/
H A Dhisilicon,ufs.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/ufs/hisilicon,ufs.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: HiSilicon Universal Flash Storage (UFS) Controller
10 - Li Wei <liwei213@huawei.com>
12 # Select only our matches, not all jedec,ufs
18 - hisilicon,hi3660-ufs
19 - hisilicon,hi3670-ufs
21 - compatible
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H A Dti,j721e-ufs.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/ufs/ti,j721e-ufs.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: TI J721e UFS Host Controller Glue Driver
10 - Vignesh Raghavendra <vigneshr@ti.com>
15 - const: ti,j721e-ufs
19 description: address of TI UFS glue registers
23 description: phandle to the M-PHY clock
25 power-domains:
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H A Dmediatek,ufs.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/ufs/mediatek,ufs.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek Universal Flash Storage (UFS) Controller
10 - Stanley Chu <stanley.chu@mediatek.com>
15 - mediatek,mt8183-ufshci
16 - mediatek,mt8192-ufshci
17 - mediatek,mt8195-ufshci
23 clock-names:
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H A Dsprd,ums9620-ufs.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ufs/sprd,ums9620-ufs.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Unisoc Universal Flash Storage (UFS) Controller
10 - Zhe Wang <zhe.wang1@unisoc.com>
13 - $ref: ufs-common.yaml
17 const: sprd,ums9620-ufs
25 clock-names:
27 - const: controller_eb
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H A Drenesas,ufs.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ufs/renesas,ufs.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car UFS Host Controller
10 - Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
13 - $ref: ufs-common.yaml
17 const: renesas,r8a779f0-ufs
23 maxItems: 2
25 clock-names:
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H A Drockchip,rk3576-ufshc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ufs/rockchip,rk3576-ufshc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip UFS Host Controller
10 - Shawn Lin <shawn.lin@rock-chips.com>
13 - $ref: ufs-common.yaml
17 const: rockchip,rk3576-ufshc
22 reg-names:
24 - const: hci
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H A Dcdns,ufshc.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/ufs/cdns,ufshc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Cadence Universal Flash Storage (UFS) Controller
10 - Jan Kotas <jank@cadence.com>
12 # Select only our matches, not all jedec,ufs-2.0
18 - cdns,ufshc
19 - cdns,ufshc-m31-16nm
21 - compatible
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H A Dsnps,tc-dwc-g210.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/ufs/snps,tc-dwc-g210.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Synopsys DesignWare Universal Flash Storage (UFS) Controller
10 - Li Wei <liwei213@huawei.com>
12 # Select only our matches, not all jedec,ufs
18 - snps,dwc-ufshcd-1.40a
20 - compatible
23 - $ref: ufs-common.yaml
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/linux/Documentation/scsi/
H A Dufs.rst1 .. SPDX-License-Identifier: GPL-2.0
11 2. UFS Architecture Overview
13 2.2 UFS Transport Protocol (UTP) layer
14 2.3 UFS Interconnect (UIC) Layer
16 3.1 UFS controller initialization
18 3.3 UFS error handling
21 5. UFS Reference Clock Frequency configuration
27 Universal Flash Storage (UFS) is a storage specification for flash devices.
29 embedded and removable flash memory-based storage in mobile
31 is defined by JEDEC Solid State Technology Association. UFS is based
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/linux/include/ufs/
H A Dufs_quirks.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
22 * ufs_dev_quirk - ufs device quirk info
23 * @card: ufs card details
33 * Some vendor's UFS device sends back to back NACs for the DL data frames
35 * such UFS device
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H A Dufshcd.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Copyright (C) 2011-2013 Samsung India Software Operations
5 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
16 #include <linux/blk-crypto-profile.h>
17 #include <linux/blk-m
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H A Dufs.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * Copyright (C) 2011-2013 Samsung India Software Operations
27 #define QUERY_DESC_MIN_SIZE 2
28 #define QUERY_DESC_HDR_SIZE 2
29 #define QUERY_OSF_SIZE (GENERAL_UPIU_REQUEST_SIZE - \
34 * UFS devic
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/linux/Documentation/ABI/testing/
H A Dsysfs-driver-ufs3 Contact: linux-scsi@vger.kernel.org
5 This file contains the auto-hibernate idle timer setting of a
6 UFS host controller. A value of '0' means auto-hibernate is not
8 idle time before the UFS host controller will autonomously put
11 10-bit values with a power-of-ten multiplier which allows a
12 maximum value of 102300000. Refer to the UFS Host Controller
16 What: /sys/bus/platform/devices/*.ufs/device_descriptor/device_type
19 Description: This file shows the device type. This is one of the UFS
21 the descriptor could be found at UFS specifications 2.1.
26 What: /sys/bus/platform/devices/*.ufs/device_descriptor/device_class
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/linux/drivers/ufs/host/
H A Dufs-exynos.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * UFS Host Controller driver for Exynos specific extensions
5 * Copyright (C) 2014-2015 Samsung Electronics Co., Ltd.
41 * results in non-functioning UFS.
116 #define UNIPRO_PCLK_PERIOD(ufs) (NSEC_PER_SEC / ufs->pclk_rate) argument
120 /* vendor specific pre-defined parameters */
122 #define FAST 2
186 int (*drv_init)(struct exynos_ufs *ufs);
187 int (*pre_link)(struct exynos_ufs *ufs);
188 int (*post_link)(struct exynos_ufs *ufs);
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H A Dcdns-pltfrm.c1 // SPDX-License-Identifier: GPL-2.0
3 * Platform UFS Host driver for Cadence controller
19 #include "ufshcd-pltfrm.h"
27 * cdns_ufs_dme_attr_val - for storing L4 attributes
33 * cdns_ufs_get_l4_attr - get L4 attributes on local side
42 &host->cdns_ufs_dme_attr_val[0]); in cdns_ufs_get_l4_attr()
44 &host->cdns_ufs_dme_attr_val[1]); in cdns_ufs_get_l4_attr()
46 &host->cdns_ufs_dme_attr_val[2]); in cdns_ufs_get_l4_attr()
48 &host->cdns_ufs_dme_attr_val[3]); in cdns_ufs_get_l4_attr()
50 &host->cdns_ufs_dme_attr_val[4]); in cdns_ufs_get_l4_attr()
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H A Dufs-rockchip.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Rockchip UFS Host Controller driver
18 #include <ufs/ufshcd.h>
19 #include <ufs/unipro.h>
20 #include "ufshcd-pltfrm.h"
21 #include "ufs-rockchip.h"
45 hba->rpm_lvl = UFS_PM_LVL_5; in ufs_rockchip_set_pm_lvl()
46 hba->spm_lvl = UFS_PM_LVL_5; in ufs_rockchip_set_pm_lvl()
56 for (int i = 0; i < 2; i++) { in ufs_rockchip_rk3576_phy_init()
57 /* Configuration M - TX */ in ufs_rockchip_rk3576_phy_init()
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/linux/Documentation/devicetree/bindings/phy/
H A Dmediatek,ufs-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/phy/mediatek,ufs-phy.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek Universal Flash Storage (UFS) M-PHY
11 - Stanley Chu <stanley.chu@mediatek.com>
12 - Chunfeng Yun <chunfeng.yun@mediatek.com>
15 UFS M-PHY nodes are defined to describe on-chip UFS M-PHY hardware macro.
16 Each UFS M-PHY node should have its own node.
17 To bind UFS M-PHY with UFS host controller, the controller node should
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H A Dtransmit-amplitude.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/transmit-amplitude.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 Binding describing the peak-to-peak transmit amplitude for common PHYs
14 - Marek Behún <kabel@kernel.org>
17 tx-p2p-microvolt:
19 Transmit amplitude voltages in microvolts, peak-to-peak. If this property
21 'tx-p2p-microvolt-names' property must be provided and contain
24 tx-p2p-microvolt-names:
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/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,gcc-apq8084.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-apq8084.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Stephen Boyd <sboyd@kernel.org>
11 - Taniya Das <quic_tdas@quicinc.com>
18 include/dt-bindings/clock/qcom,gcc-apq8084.h
19 include/dt-bindings/reset/qcom,gcc-apq8084.h
22 - $ref: qcom,gcc.yaml#
26 const: qcom,gcc-apq8084
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H A Dqcom,qcs8300-gcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,qcs8300-gcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Taniya Das <quic_tdas@quicinc.com>
11 - Imran Shaik <quic_imrashai@quicinc.com>
17 See also: include/dt-bindings/clock/qcom,qcs8300-gcc.h
21 const: qcom,qcs8300-gcc
25 - description: Board XO source
26 - description: Sleep clock source
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H A Dqcom,glymur-gcc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,glymur-gcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Taniya Das <taniya.das@oss.qualcomm.com>
16 See also: include/dt-bindings/clock/qcom,glymur-gcc.h
20 const: qcom,glymur-gcc
24 - description: Board XO source
25 - description: Board XO_A source
26 - description: Sleep clock source
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/linux/drivers/phy/qualcomm/
H A Dphy-qcom-qmp-ufs.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
22 #include <ufs/unipro.h>
24 #include "phy-qcom-qmp-common.h"
26 #include "phy-qcom-qmp.h"
27 #include "phy-qcom-qmp-pcs-ufs-v2.h"
28 #include "phy-qcom-qmp-pcs-ufs-v3.h"
29 #include "phy-qcom-qmp-pcs-ufs-v4.h"
30 #include "phy-qcom-qmp-pcs-ufs-v5.h"
31 #include "phy-qcom-qmp-pcs-ufs-v6.h"
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/linux/drivers/phy/samsung/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
15 tristate "S5P/Exynos SoC series MIPI CSI-2/DSI PHY driver"
21 Support for MIPI CSI-2 and MIPI DSI DPHY found on Samsung S5P
33 tristate "Exynos SoC series UFS PHY driver"
38 Enable this to support the Samsung Exynos SoC UFS PHY driver for
39 Samsung Exynos SoCs. This driver provides the interface for UFS host
78 are available - device and host.
/linux/include/uapi/scsi/
H A Dscsi_bsg_ufs.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
3 * UFS Transport SGIO v4 BSG Message Support
5 * Copyright (C) 2011-2013 Samsung India Software Operations
26 /* UFS RPMB Request Message Types */
40 * struct utp_upiu_header - UPIU header structure
41 * @dword_0: UPIU header DW-0
42 * @dword_1: UPIU header DW-1
43 * @dword_2: UPIU header DW-2
52 * @command_set_type: 0 for SCSI command set; 1 for UFS specific.
97 * struct utp_upiu_query - upiu request buffer structure for
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/linux/drivers/clk/mediatek/
H A Dclk-mt8196-ufs_ao.c1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/clock/mediatek,mt8196-clock.h>
9 #include <dt-bindings/reset/mediatek,mt8196-resets.h>
11 #include <linux/clk-provider.h>
16 #include "clk-gate.h"
17 #include "clk-mtk.h"
54 GATE_UFSAO0(CLK_UFSAO_UFSHCI_UFS, "ufsao_ufshci_ufs", "ufs", 0),
59 GATE_UFSAO1(CLK_UFSAO_UNIPRO_RX_SYM1, "ufsao_unipro_rx_sym1", "clk26m", 2),
60 GATE_UFSAO1(CLK_UFSAO_UNIPRO_SYS, "ufsao_unipro_sys", "ufs", 3),
74 [MT8196_UFSAO_RST1_UFSHCI] = 1 * RST_NR_PER_BANK + 2,
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