| /linux/sound/soc/codecs/ |
| H A D | lpass-tx-macro.c | 246 struct tx_macro *tx; member
252 struct tx_macro *tx; member
295 /* TX Macro */
439 /* Update volatile list for tx/tx macros */ in tx_is_volatile_register()
614 static int tx_macro_mclk_enable(struct tx_macro *tx, in tx_macro_mclk_enable() argument
617 struct regmap *regmap = tx->regmap; in tx_macro_mclk_enable()
621 if (tx->tx_mclk_users == 0) { in tx_macro_mclk_enable()
635 tx->tx_mclk_users++; in tx_macro_mclk_enable()
637 if (tx->tx_mclk_users <= 0) { in tx_macro_mclk_enable()
638 dev_err(tx->dev, "clock already disabled\n"); in tx_macro_mclk_enable()
[all …]
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| /linux/drivers/net/ethernet/google/gve/ |
| H A D | gve_tx_dqo.c | 19 static bool gve_has_free_tx_qpl_bufs(struct gve_tx_ring *tx, int count) in gve_has_free_tx_qpl_bufs() argument
23 if (!tx->dqo.qpl) in gve_has_free_tx_qpl_bufs()
26 num_avail = tx->dqo.num_tx_qpl_bufs - in gve_has_free_tx_qpl_bufs()
27 (tx->dqo_tx.alloc_tx_qpl_buf_cnt - in gve_has_free_tx_qpl_bufs()
28 tx->dqo_tx.free_tx_qpl_buf_cnt); in gve_has_free_tx_qpl_bufs()
34 tx->dqo_tx.free_tx_qpl_buf_cnt = in gve_has_free_tx_qpl_bufs()
35 atomic_read_acquire(&tx->dqo_compl.free_tx_qpl_buf_cnt); in gve_has_free_tx_qpl_bufs()
37 num_avail = tx->dqo.num_tx_qpl_bufs - in gve_has_free_tx_qpl_bufs()
38 (tx->dqo_tx.alloc_tx_qpl_buf_cnt - in gve_has_free_tx_qpl_bufs()
39 tx->dqo_tx.free_tx_qpl_buf_cnt); in gve_has_free_tx_qpl_bufs()
[all …]
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| /linux/drivers/rpmsg/ |
| H A D | qcom_glink_trace.h | 14 TP_PROTO(const char *remote, unsigned int version, unsigned int features, bool tx),
15 TP_ARGS(remote, version, features, tx),
20 __field(bool, tx)
26 __entry->tx = tx;
29 __entry->tx ? "tx" : "rx",
39 TP_PROTO(const char *remote, unsigned int version, unsigned int features, bool tx),
40 TP_ARGS(remote, version, features, tx),
45 __field(bool, tx)
51 __entry->tx = tx;
54 __entry->tx ? "tx" : "rx",
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| /linux/drivers/media/i2c/adv748x/ |
| H A D | adv748x-csi2.c | 25 int adv748x_csi2_set_virtual_channel(struct adv748x_csi2 *tx, unsigned int vc) in adv748x_csi2_set_virtual_channel() argument
27 return tx_write(tx, ADV748X_CSI_VC_REF, vc << ADV748X_CSI_VC_REF_SHIFT); in adv748x_csi2_set_virtual_channel()
33 * @tx: CSI2 private entity
36 * @src_pad: Pad number of source to link to this @tx
42 static int adv748x_csi2_register_link(struct adv748x_csi2 *tx, in adv748x_csi2_register_link() argument
57 &tx->sd.entity, ADV748X_CSI2_SINK, in adv748x_csi2_register_link()
63 tx->src = src; in adv748x_csi2_register_link()
104 struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd); in adv748x_csi2_registered() local
105 struct adv748x_state *state = tx->state; in adv748x_csi2_registered()
108 adv_dbg(state, "Registered %s (%s)", is_txa(tx) ? "TXA":"TXB", in adv748x_csi2_registered()
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| /linux/tools/testing/selftests/drivers/net/netdevsim/ |
| H A D | ethtool-coalesce.sh | 31 ["tx-frames-low"]="tx-frame-low"
33 ["tx-frames-high"]="tx-frame-high"
38 ["tx-usecs"]="tx-usecs"
39 ["tx-frames"]="tx-frames"
40 ["tx-usecs-irq"]="tx-usecs-irq"
41 ["tx-frames-irq"]="tx-frames-irq"
45 ["tx-usecs-low"]="tx-usecs-low"
48 ["tx-usecs-high"]="tx-usecs-high"
54 ["tx-frames-low"]=""
56 ["tx-frames-high"]=""
[all …]
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| /linux/drivers/firmware/tegra/ |
| H A D | ivc.c | 48 * written through the tx.channel pointer, while the second is only written
62 } tx; member
102 u32 tx = tegra_ivc_header_read_field(map, tx.count); in tegra_ivc_empty() local
115 if (tx - rx > ivc->num_frames) in tegra_ivc_empty()
118 return tx == rx; in tegra_ivc_empty()
123 u32 tx = tegra_ivc_header_read_field(map, tx.count); in tegra_ivc_full() local
130 return tx - rx >= ivc->num_frames; in tegra_ivc_full()
135 u32 tx = tegra_ivc_header_read_field(map, tx.count); in tegra_ivc_available() local
144 return tx - rx; in tegra_ivc_available()
149 unsigned int count = tegra_ivc_header_read_field(&ivc->tx.map, tx.count); in tegra_ivc_advance_tx()
[all …]
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| /linux/tools/testing/selftests/drivers/net/hw/ |
| H A D | ethtool_mm.sh | 47 local tx=$1; shift
55 # MAC Merge TX direction is disabled. That being said, at least the
56 # NXP ENETC does not, and requires tx-enabled on in order to respond to
58 ethtool --set-mm $rx tx-enabled on
59 ethtool --set-mm $tx verify-enabled on tx-enabled on
64 ethtool --json --show-mm $tx | jq -r '.[]."verify-status"' | \
68 ethtool --json --show-mm $tx | jq -r '.[]."tx-active"' | grep -q 'true'
69 check_err "$?" "pMAC TX is not active"
71 traffic_test $tx "pmac"
72 check_err "$?" "Traffic did not get sent through $tx's pMAC"
[all …]
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| /linux/drivers/fpga/ |
| H A D | machxo2-spi.c | 69 struct spi_transfer rx, tx; in get_status() local
74 memset(&tx, 0, sizeof(tx)); in get_status()
75 tx.tx_buf = cmd; in get_status()
76 tx.len = sizeof(cmd); in get_status()
80 spi_message_add_tail(&tx, &msg); in get_status()
139 struct spi_transfer tx[2]; in machxo2_cleanup() local
144 memset(tx, 0, sizeof(tx)); in machxo2_cleanup()
146 tx[0].tx_buf = &erase; in machxo2_cleanup()
147 tx[0].len = sizeof(erase); in machxo2_cleanup()
148 spi_message_add_tail(&tx[0], &msg); in machxo2_cleanup()
[all …]
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| /linux/drivers/clk/mediatek/ |
| H A D | clk-apmixed.c | 32 struct mtk_ref2usb_tx *tx = to_mtk_ref2usb_tx(hw); in mtk_ref2usb_tx_is_prepared() local
34 return (readl(tx->base_addr) & REF2USB_EN_MASK) == REF2USB_EN_MASK; in mtk_ref2usb_tx_is_prepared()
39 struct mtk_ref2usb_tx *tx = to_mtk_ref2usb_tx(hw); in mtk_ref2usb_tx_prepare() local
42 val = readl(tx->base_addr); in mtk_ref2usb_tx_prepare()
45 writel(val, tx->base_addr); in mtk_ref2usb_tx_prepare()
49 writel(val, tx->base_addr); in mtk_ref2usb_tx_prepare()
52 writel(val, tx->base_addr); in mtk_ref2usb_tx_prepare()
59 struct mtk_ref2usb_tx *tx = to_mtk_ref2usb_tx(hw); in mtk_ref2usb_tx_unprepare() local
62 val = readl(tx->base_addr); in mtk_ref2usb_tx_unprepare()
64 writel(val, tx->base_addr); in mtk_ref2usb_tx_unprepare()
[all …]
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| /linux/crypto/async_tx/ |
| H A D | async_tx.c | 62 * @tx: the new operation
66 struct dma_async_tx_descriptor *tx) in async_tx_channel_switch() argument
74 if (txd_parent(depend_tx) && depend_tx->chan == tx->chan) { in async_tx_channel_switch()
75 txd_chain(depend_tx, tx); in async_tx_channel_switch()
100 txd_chain(intr_tx, tx); in async_tx_channel_switch()
121 tx->tx_submit(tx); in async_tx_channel_switch()
143 async_tx_submit(struct dma_chan *chan, struct dma_async_tx_descriptor *tx, in async_tx_submit() argument
148 tx->callback = submit->cb_fn; in async_tx_submit()
149 tx->callback_param = submit->cb_param; in async_tx_submit()
161 txd_parent(tx)); in async_tx_submit()
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| /linux/drivers/net/ethernet/engleder/ |
| H A D | tsnep_main.c | 10 * It supports multiple TX/RX queue pairs. The first TX/RX queue pair is used
100 /* handle TX/RX queue 0 interrupt */ in tsnep_irq()
116 /* handle TX/RX queue interrupt */ in tsnep_irq_txrx()
278 static void tsnep_tx_ring_cleanup(struct tsnep_tx *tx) in tsnep_tx_ring_cleanup() argument
280 struct device *dmadev = tx->adapter->dmadev; in tsnep_tx_ring_cleanup()
283 memset(tx->entry, 0, sizeof(tx->entry)); in tsnep_tx_ring_cleanup()
286 if (tx->page[i]) { in tsnep_tx_ring_cleanup()
287 dma_free_coherent(dmadev, PAGE_SIZE, tx->page[i], in tsnep_tx_ring_cleanup()
288 tx->page_dma[i]); in tsnep_tx_ring_cleanup()
289 tx->page[i] = NULL; in tsnep_tx_ring_cleanup()
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| /linux/drivers/net/ethernet/mellanox/mlxbf_gige/ |
| H A D | mlxbf_gige_tx.c | 14 * 1) Allocates TX WQE array using coherent DMA mapping
15 * 2) Allocates TX completion counter using coherent DMA mapping
30 /* Write TX WQE base address into MMIO reg */ in mlxbf_gige_tx_init()
33 /* Allocate address for TX completion count */ in mlxbf_gige_tx_init()
42 /* Write TX CC base address into MMIO reg */ in mlxbf_gige_tx_init()
56 * namely the TX WQE array and the TX completion counter
92 /* Function that returns status of TX ring:
93 * 0: TX ring is full, i.e. there are no
94 * available un-used entries in TX ring.
95 * non-null: TX ring is not full, i.e. there are
[all …]
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| /linux/tools/testing/selftests/timers/ |
| H A D | leap-a-day.c | 100 struct timex tx; in clear_time_state()
109 tx.modes = ADJ_STATUS; in clear_time_state()
110 tx.status = STA_PLL; in clear_time_state()
111 ret = adjtimex(&tx); in clear_time_state()
114 tx.modes = ADJ_MAXERROR; in clear_time_state()
115 tx.maxerror = 0; in clear_time_state()
116 ret = adjtimex(&tx); in clear_time_state()
119 tx.modes = ADJ_STATUS; in clear_time_state()
120 tx.status = 0; in clear_time_state()
121 ret = adjtimex(&tx); in clear_time_state()
97 struct timex tx; clear_time_state() local
132 struct timex tx; sigalarm() local
239 struct timex tx; main() local
[all...] |
| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | qcom,lpass-tx-macro.yaml | 4 $id: http://devicetree.org/schemas/sound/qcom,lpass-tx-macro.yaml#
7 title: LPASS(Low Power Audio Subsystem) TX Macro audio codec
16 - qcom,sc7280-lpass-tx-macro
17 - qcom,sm6115-lpass-tx-macro
18 - qcom,sm8250-lpass-tx-macro
19 - qcom,sm8450-lpass-tx-macro
20 - qcom,sm8550-lpass-tx-macro
21 - qcom,sc8280xp-lpass-tx-macro
24 - qcom,eliza-lpass-tx-macro
25 - qcom,kaanapali-lpass-tx-macro
[all …]
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| /linux/drivers/infiniband/hw/hfi1/ |
| H A D | ipoib_tx.c | 101 * The tx queue len can be adjusted upward while the interface is in hfi1_ipoib_check_queue_stopped()
103 * The tx queue len can be large enough to overflow the txreq_ring. in hfi1_ipoib_check_queue_stopped()
114 static void hfi1_ipoib_free_tx(struct ipoib_txreq *tx, int budget) in hfi1_ipoib_free_tx() argument
116 struct hfi1_ipoib_dev_priv *priv = tx->txq->priv; in hfi1_ipoib_free_tx()
118 if (likely(!tx->sdma_status)) { in hfi1_ipoib_free_tx()
119 dev_sw_netstats_tx_add(priv->netdev, 1, tx->skb->len); in hfi1_ipoib_free_tx()
124 __func__, tx->sdma_status, in hfi1_ipoib_free_tx()
125 le64_to_cpu(tx->sdma_hdr->pbc), tx->txq->q_idx, in hfi1_ipoib_free_tx()
126 tx->txq->sde->this_idx); in hfi1_ipoib_free_tx()
129 napi_consume_skb(tx->skb, budget); in hfi1_ipoib_free_tx()
[all …]
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| H A D | verbs_txreq.h | 38 struct verbs_txreq *tx; in get_txreq() local
41 tx = kmem_cache_alloc(dev->verbs_txreq_cache, VERBS_TXREQ_GFP); in get_txreq()
42 if (unlikely(!tx)) { in get_txreq()
44 tx = __get_txreq(dev, qp); in get_txreq()
45 if (!tx) in get_txreq()
46 return tx; in get_txreq()
48 tx->qp = qp; in get_txreq()
49 tx->mr = NULL; in get_txreq()
50 tx->sde = priv->s_sde; in get_txreq()
51 tx->psc = priv->s_sendcontext; in get_txreq()
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| H A D | sdma.h | 190 * The tx request, once initialized, is manipulated with calls to
199 * in the tx. Memory locations added with sdma_txadd_page()
201 * to the tx and nmapped as part of the progress processing in the
205 * tx. An example of a use case would be a pre-allocated
212 * a tx to the ring after the appropriate number of
219 * long as the tx isn't in flight.
439 struct sdma_txreq *tx,
447 * @tx: tx request to initialize
478 * being submitted. The callback will be provided this tx, a status, and a flag.
498 struct sdma_txreq *tx, in sdma_txinit_ahg() argument
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| /linux/drivers/net/phy/ |
| H A D | linkmode.c | 19 * 0 1 1 1 TX
21 * 1 X 1 X TX+RX
49 * @tx: boolean from ethtool struct ethtool_pauseparam tx_pause member
53 * capabilities of provided in @tx and @rx.
56 * tx rx Pause AsymDir
62 * Note: this translation from ethtool tx/rx notation to the advertisement
65 * For tx=0 rx=1, meaning transmit is unsupported, receive is supported:
69 * 1 1 1 0 TX + RX - but we have no TX support.
72 * For tx=1 rx=1, meaning we have the capability to transmit and receive
77 * 1 0 0 1 Disabled - but since we do support tx and rx,
[all …]
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| /linux/sound/soc/mediatek/common/ |
| H A D | mtk-btcvsd.c | 27 /* TX */
130 spinlock_t tx_lock; /* spinlock for bt tx stream control */
135 struct mtk_btcvsd_snd_stream *tx; member
209 dev_dbg(bt->dev, "%s(), stream %d, state %d, tx->state %d, rx->state %d, irq_disabled %d\n", in mtk_btcvsd_snd_set_state()
212 bt->tx->state, bt->rx->state, bt->irq_disabled); in mtk_btcvsd_snd_set_state()
216 if (bt->tx->state == BT_SCO_STATE_IDLE && in mtk_btcvsd_snd_set_state()
234 memset(bt->tx, 0, sizeof(*bt->tx)); in mtk_btcvsd_snd_tx_init()
237 bt->tx->packet_size = BTCVSD_TX_PACKET_SIZE; in mtk_btcvsd_snd_tx_init()
238 bt->tx in mtk_btcvsd_snd_tx_init()
[all...] |
| /linux/sound/soc/fsl/ |
| H A D | fsl_sai.c | 102 int adir = (dir == TX) ? RX : TX; in fsl_sai_dir_is_synced()
148 /* Tx IRQ */ in fsl_sai_isr()
158 dev_dbg(dev, "isr: Start of Tx word detected\n"); in fsl_sai_isr()
161 dev_dbg(dev, "isr: Tx Frame sync error detected\n"); in fsl_sai_isr()
217 bool tx = true; in fsl_sai_set_dai_tdm_slot_tx() local
219 sai->slots[tx] = slots; in fsl_sai_set_dai_tdm_slot_tx()
220 sai->slot_width[tx] = slot_width; in fsl_sai_set_dai_tdm_slot_tx()
229 bool tx = false; in fsl_sai_set_dai_tdm_slot_rx() local
231 sai->slots[tx] = slots; in fsl_sai_set_dai_tdm_slot_rx()
232 sai->slot_width[tx] = slot_width; in fsl_sai_set_dai_tdm_slot_rx()
[all …]
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| /linux/Documentation/devicetree/bindings/net/ |
| H A D | renesas,rzv2h-gbeth.yaml | 56 - description: TX clock
58 - description: TX clock phase-shifted by 180 degrees
61 - description: RMII TX clock
69 - description: TX clock
77 - const: tx
79 - const: tx-180
90 - const: tx
102 - const: tx-queue-0
103 - const: tx-queue-1
104 - const: tx-queue-2
[all …]
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| /linux/drivers/net/ethernet/intel/ice/ |
| H A D | ice_ptp.c | 89 * ice_ptp_cfg_tx_interrupt - Configure Tx timestamp interrupt for the device
92 * Program the device to respond appropriately to the Tx timestamp interrupt
118 /* Configure the Tx timestamp interrupt */ in ice_ptp_cfg_tx_interrupt()
269 * This algorithm works even if the PHC time was updated after a Tx timestamp
270 * was requested, but before the Tx timestamp event was reported from
279 * a second, and (b) discarding any Tx timestamp packet if it has waited for
316 * The Tx and Rx timestamps are 40 bits wide, including 32 bits of nominal
354 * ice_ptp_is_tx_tracker_up - Check if Tx tracker is ready for new timestamps
355 * @tx: the PTP Tx timestamp tracker to check
357 * Check that a given PTP Tx timestamp tracker is up, i.e. that it is ready
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| /linux/drivers/net/wireless/broadcom/b43/ |
| H A D | radio_2055.h | 21 #define B2055_C1_SP_TXGC1 0x0D /* SP TX GC1 Core 1 */
22 #define B2055_C1_SP_TXGC2 0x0E /* SP TX GC2 Core 1 */
23 #define B2055_C2_SP_TXGC1 0x0F /* SP TX GC1 Core 2 */
24 #define B2055_C2_SP_TXGC2 0x10 /* SP TX GC2 Core 2 */
30 #define B2055_C1_PD_TX 0x16 /* PD Core 1 TX */
34 #define B2055_C2_PD_TX 0x1A /* PD Core 2 TX */
129 #define B2055_C1_RX_TXBBRCAL 0x79 /* Core 1 RX TX BB RCAL */
130 #define B2055_C1_TX_RF_SPGA 0x7A /* Core 1 TX RF SGM PGA */
131 #define B2055_C1_TX_RF_SPAD 0x7B /* Core 1 TX RF SGM PAD */
132 #define B2055_C1_TX_RF_CNTPGA1 0x7C /* Core 1 TX RF counter PGA 1 */
[all …]
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| /linux/drivers/net/ethernet/microchip/ |
| H A D | lan743x_main.c | 236 struct lan743x_tx *tx = context; in lan743x_tx_isr() local
237 struct lan743x_adapter *adapter = tx->adapter; in lan743x_tx_isr()
243 INT_BIT_DMA_TX_(tx->channel_number)); in lan743x_tx_isr()
246 if (int_sts & INT_BIT_DMA_TX_(tx->channel_number)) { in lan743x_tx_isr()
247 u32 ioc_bit = DMAC_INT_BIT_TX_IOC_(tx->channel_number); in lan743x_tx_isr()
264 napi_schedule(&tx->napi); in lan743x_tx_isr()
272 INT_BIT_DMA_TX_(tx->channel_number)); in lan743x_tx_isr()
339 lan743x_tx_isr(&adapter->tx[channel], in lan743x_intr_shared_isr()
689 /* map TX interrupt to vector */ in lan743x_intr_open()
693 /* Remove TX interrupt from shared mask */ in lan743x_intr_open()
[all …]
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| /linux/drivers/dma/ |
| H A D | dmaengine.h | 24 * @tx: descriptor needing cookie
29 static inline dma_cookie_t dma_cookie_assign(struct dma_async_tx_descriptor *tx) in dma_cookie_assign() argument
31 struct dma_chan *chan = tx->chan; in dma_cookie_assign()
37 tx->cookie = chan->cookie = cookie; in dma_cookie_assign()
44 * @tx: descriptor to complete
52 static inline void dma_cookie_complete(struct dma_async_tx_descriptor *tx) in dma_cookie_complete() argument
54 BUG_ON(tx->cookie < DMA_MIN_COOKIE); in dma_cookie_complete()
55 tx->chan->completed_cookie = tx->cookie; in dma_cookie_complete()
56 tx->cookie = 0; in dma_cookie_complete()
106 * @tx: tx descriptor
[all …]
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