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/linux/Documentation/devicetree/bindings/net/
H A Dintel,dwmac-plat.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com>
17 - intel,keembay-dwmac
19 - compatible
22 - $ref: snps,dwmac.yaml#
27 - items:
28 - enum:
[all …]
/linux/arch/arm64/boot/dts/intel/
H A Dsocfpga_agilex5.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
7 #include <dt-bindings/reset/altr,rst-mgr-s10.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/clock/intel,agilex5-clkmgr.h>
14 compatible = "intel,socfpga-agilex5";
15 #address-cells = <2>;
16 #size-cells = <2>;
[all …]
/linux/arch/arm64/boot/dts/renesas/
H A Dr9a09g087.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
15 interrupt-parent = <&gic>;
18 #address-cells = <1>;
19 #size-cells = <0>;
22 compatible = "arm,cortex-a55";
25 next-level-cache = <&L3_CA55>;
[all …]
H A Dr9a09g077.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
15 interrupt-parent = <&gic>;
18 #address-cells = <1>;
19 #size-cells = <0>;
22 compatible = "arm,cortex-a55";
25 next-level-cache = <&L3_CA55>;
[all …]
H A Dr9a09g056.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/clock/renesas,r9a09g056-cpg.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/pinctrl/rzg2l-pinctrl.h>
12 /* RZV2N_Px = Offset address of PFC_P_mn - 0x20 */
31 #address-cells = <2>;
32 #size-cells = <2>;
33 interrupt-parent = <&gic>;
35 audio_extal_clk: audio-clk {
36 compatible = "fixed-clock";
[all …]
H A Dr9a09g047.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/clock/renesas,r9a09g047-cpg.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
15 interrupt-parent = <&gic>;
17 audio_extal_clk: audio-clk {
18 compatible = "fixed-clock";
19 #clock-cells = <0>;
21 clock-frequency = <0>;
[all …]
H A Dr9a09g057.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
8 #include <dt-bindings/clock/renesas,r9a09g057-cpg.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #address-cells = <2>;
14 #size-cells = <2>;
15 interrupt-parent = <&gic>;
17 audio_extal_clk: audio-clk {
18 compatible = "fixed-clock";
19 #clock-cells = <0>;
21 clock-frequency = <0>;
[all …]
/linux/arch/arm64/boot/dts/qcom/
H A Dsa8540p-ride.dts1 // SPDX-License-Identifier: BSD-3-Clause
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include "sa8540p-pmics.dtsi"
17 compatible = "qcom,sa8540p-ride", "qcom,sa8540p";
29 stdout-path = "serial0:115200n8";
34 regulators-0 {
35 compatible = "qcom,pm8150-rpmh-regulators";
36 qcom,pmic-id = "a";
[all …]
H A Dqcs8300-ride.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
12 #include "monaco-pmics.dtsi"
15 compatible = "qcom,qcs8300-ride", "qcom,qcs8300";
16 chassis-type = "embedded";
24 stdout-path = "serial0:115200n8";
27 regulator-usb2-vbus {
28 compatible = "regulator-fixed";
[all …]
H A Dsa8155p-adp.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
9 #include <dt-bindings/gpio/gpio.h>
16 compatible = "qcom,sa8155p-adp", "qcom,sa8155p";
24 stdout-path = "serial0:115200n8";
27 vreg_3p3: vreg-3p3-regulator {
28 compatible = "regulator-fixed";
29 regulator-name = "vreg_3p3";
30 regulator-min-microvolt = <3300000>;
[all …]
H A Dmonaco-evk.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/sound/qcom,q6afe.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13 #include "monaco-pmics.dtsi"
17 compatible = "qcom,monaco-evk", "qcom,qcs8300";
26 stdout-path = "serial0:115200n8";
29 dmic: audio-codec-0 {
30 compatible = "dmic-codec";
[all …]
H A Dlemans-evk.dts1 // SPDX-License-Identifier: BSD-3-Clause
3 * Copyright (c) 2024-2025, Qualcomm Innovation Center, Inc. All rights reserved.
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pwm/pwm.h>
10 #include <dt-bindings/sound/qcom,q6afe.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
14 #include "lemans-pmics.dtsi"
18 compatible = "qcom,lemans-evk", "qcom,qcs9100", "qcom,sa8775p";
26 dmic: audio-codec-0 {
[all …]
/linux/drivers/mfd/
H A Drave-sp.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Supervisory Processor(SP) MCU that is connected via dedicated UART
12 #include <linux/crc-itu-t.h>
18 #include <linux/mfd/rave-sp.h>
22 #include <linux/sched.h>
28 * - message to MCU => ACK response
29 * - event from MCU => event ACK
34 * - STX - is start of transmission character
35 * - ETX - end of transmission
36 * - DATA - payload
[all …]
/linux/drivers/net/ethernet/sis/
H A Dsis900.c17 SiS 7014 Single Chip 100BASE-TX/10BASE-T Physical Layer Solution,
24 Rev 1.08.06 Sep. 24 2002 Mufasa Yang bug fix for Tx timeout & add SiS963 support
25 Rev 1.08.05 Jun. 6 2002 Mufasa Yang bug fix for read_eeprom & Tx descriptor over-boundary
28 Rev 1.08.02 Nov. 30 2001 Hui-Fen Hsu workaround for EDB & bug fix for dhcp problem
29 Rev 1.08.01 Aug. 25 2001 Hui-Fen Hsu update for 630ET & workaround for ICS1893 PHY
30 Rev 1.08.00 Jun. 11 2001 Hui-Fen Hsu workaround for RTL8201 PHY and some bug fix
31 …Rev 1.07.11 Apr. 2 2001 Hui-Fen Hsu updates PCI drivers to use the new pci_set_dma_mask for kerne…
32 Rev 1.07.10 Mar. 1 2001 Hui-Fen Hsu <hfhsu@sis.com.tw> some bug fix & 635M/B support
34 Rev 1.07.08 Jan. 8 2001 Lei-Chun Chang added RTL8201 PHY support
35 …Rev 1.07.07 Nov. 29 2000 Lei-Chun Chang added kernel-doc extractable documentation and 630 workaro…
[all …]
/linux/net/l2tp/
H A Dl2tp_ppp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * PPPoX --- Generic PPP encapsulation socket family
6 * PPPoL2TP --
907 struct sockaddr_pppol2tp sp; pppol2tp_getname() local
925 struct sockaddr_pppol2tpin6 sp; pppol2tp_getname() local
943 struct sockaddr_pppol2tpv3in6 sp; pppol2tp_getname() local
962 struct sockaddr_pppol2tpv3 sp; pppol2tp_getname() local
[all...]
/linux/drivers/net/wireless/marvell/libertas/
H A Dcmd.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include <linux/sched.h>
18 #define CAL_NF(nf) ((s32)(-(s32)(nf)))
22 * lbs_cmd_copyback - Simple callback that copies response back into command
37 copy_len = min(le16_to_cpu(buf->size), le16_to_cpu(resp->size)); in lbs_cmd_copyback()
44 * lbs_cmd_async_callback - Simple callback that ignores the result.
62 * is_command_allowed_in_ps - tests if a command is allowed in Power Save mode
82 * lbs_update_hw_spec - Updates the hardware details like MAC address
92 int ret = -1; in lbs_update_hw_spec()
97 memcpy(cmd.permanentaddr, priv->current_addr, ETH_ALEN); in lbs_update_hw_spec()
[all …]
/linux/drivers/scsi/qla2xxx/
H A Dqla_def.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Copyright (c) 2003-2014 QLogic Corporation
15 #include <linux/dma-mapping.h>
16 #include <linux/sched.h>
234 /* 83XX: Macros defining 8200 AEN Error-levels */
248 /* 83XX: Macros for defining IDC-Control bits */
257 /* 83XX: Macros for defining class in DEV-Partition Info register */
263 /* 83XX: Macros for IDC Lock-Recovery stages */
265 * lock-recovery
267 #define IDC_LOCK_RECOVERY_STAGE2 0x2 /* Stage2: Perform lock-recovery */
[all …]
H A Dqla_os.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2003-2014 QLogic Corporation
66 "Enable/disable security. 0(Default) - Security disabled. 1 - Security enabled.");
72 "beginning. Default is 0 - class 2 not supported.");
84 "a PORT-DOWN status.");
91 "Default is 0 - no PLOGI. 1 - perform PLOGI.");
103 "vary by ISP type. Default is 1 - allocate memory.");
110 "\t\tDefault is 0 - no logging. 0x40000000 - Module Init & Probe.\n"
111 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
112 "\t\t0x08000000 - IO tracing. 0x04000000 - DPC Thread.\n"
[all …]
H A Dqla_isr.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Copyright (c) 2003-2014 QLogic Corporation
13 #include <linux/t10-pi.h>
18 #include <linux/nvme-fc-driver.h>
37 void *pkt = &item->iocb; in qla27xx_process_purex_fpin()
38 uint16_t pkt_size = item->size; in qla27xx_process_purex_fpin()
44 "-------- ELS REQ -------\n"); in qla27xx_process_purex_fpin()
48 fc_host_fpin_rcv(vha->host, pkt_size, (char *)pkt, 0); in qla27xx_process_purex_fpin()
79 (struct abts_entry_24xx *)&pkt->iocb; in qla24xx_process_abts()
80 struct qla_hw_data *ha = vha->hw; in qla24xx_process_abts()
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt2712e.dtsi5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/mt2712-clk.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/memory/mt2712-larb-port.h>
12 #include <dt-bindings/phy/phy.h>
13 #include <dt-bindings/power/mt2712-power.h>
14 #include "mt2712-pinfunc.h"
18 interrupt-parent = <&sysirq>;
19 #address-cells = <2>;
[all …]
/linux/tools/perf/Documentation/
H A Dperf-script.txt1 perf-script(1)
5 ----
6 perf-script - Read perf.data (created by perf record) and display trace output
9 --------
12 'perf script' [<options>] record <script> [<record-options>] <command>
13 'perf script' [<options>] report <script> [script-args]
14 'perf script' [<options>] <script> <required-script-args> [<record-options>] <command>
15 'perf script' [<options>] <top-script> [script-args]
18 -----------
26 You can also run a set of pre-canned scripts that aggregate and
[all …]
/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
13 compatible = "fsl,imx8mp-evk", "fsl,imx8mp";
16 stdout-path = &uart2;
19 backlight_lvds: backlight-lvds {
20 compatible = "pwm-backlight";
22 brightness-levels = <0 100>;
23 num-interpolated-steps = <100>;
24 default-brightness-level = <100>;
[all …]
/linux/drivers/net/ethernet/broadcom/
H A Dtg3.c7 * Copyright (C) 2005-2016 Broadcom Corporation.
8 * Copyright (C) 2016-2017 Broadcom Limited.
14 * Copyright (C) 2000-2016 Broadcom Corporation.
15 * Copyright (C) 2016-2017 Broadcom Ltd.
29 #include <linux/sched/signal.h>
52 #include <linux/dma-mapping.h>
56 #include <linux/hwmon-sysfs.h>
94 _tg3_flag(TG3_FLAG_##flag, (tp)->tg3_flags)
96 _tg3_flag_set(TG3_FLAG_##flag, (tp)->tg3_flags)
98 _tg3_flag_clear(TG3_FLAG_##flag, (tp)->tg3_flags)
[all …]
/linux/drivers/net/ethernet/hisilicon/hns3/hns3pf/
H A Dhclge_debugfs.c1 // SPDX-License-Identifier: GPL-2.0+
2 /* Copyright (c) 2018-2019 Hisilicon Limited. */
5 #include <linux/sched/clock.h>
16 (((struct hnae3_ae_dev *)hnae3_seq_file_to_ae_dev(s))->priv)
730 sprintf(buf, "vf%u", id - 1U); in hclge_dbg_get_func_id_str()
747 dev_err(&hdev->pdev->dev, in hclge_dbg_get_dfx_bd_num()
758 dev_err(&hdev->pdev->dev, "The value of dfx bd_num is 0!\n"); in hclge_dbg_get_dfx_bd_num()
759 return -EINVAL; in hclge_dbg_get_dfx_bd_num()
772 desc->data[0] = cpu_to_le32(index); in hclge_dbg_cmd_send()
775 desc->flag |= cpu_to_le16(HCLGE_COMM_CMD_FLAG_NEXT); in hclge_dbg_cmd_send()
[all …]
/linux/drivers/net/wireless/st/cw1200/
H A Dwsm.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * ST-Ericsson CW1200 mac80211 drivers.
6 * Copyright (c) 2010, ST-Ericsson
13 #include <linux/sched.h>
29 if ((buf)->data + size > (buf)->end) \
31 (buf)->data += size; \
36 if ((buf)->data + size > (buf)->end) \
38 memcpy(ptr, (buf)->data, size); \
39 (buf)->data += size; \
45 if ((buf)->data + sizeof(type) > (buf)->end) \
[all …]

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