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/linux/Documentation/devicetree/bindings/spi/
H A Darm,pl022-peripheral-props.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/arm,pl022-peripheral-props.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Peripheral-specific properties for Arm PL022 SPI controller
10 - Linus Walleij <linus.walleij@linaro.org>
19 - 0 # SPI
20 - 1 # Texas Instruments Synchronous Serial Frame Format
21 - 2 # Microwire (Half Duplex)
23 pl022,com-mode:
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H A Dspi-pl022.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-pl022.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Linus Walleij <linus.walleij@linaro.org>
13 - $ref: spi-controller.yaml#
14 - $ref: /schemas/arm/primecell.yaml#
23 - compatible
28 - const: arm,pl022
29 - const: arm,primecell
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/linux/drivers/iio/adc/
H A Dti-tsc2046.c1 // SPDX-License-Identifier: GPL-2.0
24 * The PENIRQ of TSC2046 controller is implemented as level shifter attached to
25 * the X+ line. If voltage of the X+ line reaches a specific level the IRQ will
29 * - rate limiting:
31 * - hrtimer:
61 * conversion has 12-bit resolution, whereas with this bit high, the next
62 * conversion has 8-bit resolution. This driver is optimized for 12-bit mode.
68 * SER/DFR - The SER/DFR bit controls the reference mode, either single-ended
75 * auto-wake/suspend mode. In most case this bits should stay zero.
102 * Data received from the controller. This field is empty for the TX
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/linux/arch/arm/boot/dts/st/
H A Dspear1310-evb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 compatible = "st,spear1310-evb", "st,spear1310";
14 #address-cells = <1>;
15 #size-cells = <1>;
23 pinctrl-names = "default";
24 pinctrl-0 = <&state_default>;
63 smi-pmx {
127 label = "u-boot";
149 compatible = "gpio-keys";
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H A Dspear1340-evb.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
8 /dts-v1/;
13 compatible = "st,spear1340-evb", "st,spear1340";
14 #address-cells = <1>;
15 #size-cells = <1>;
23 pinctrl-names = "default";
24 pinctrl-0 = <&state_default>;
47 spdif-in {
51 spdif-out {
59 smi-pmx {
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/linux/arch/arm64/boot/dts/amd/
H A Damd-overdrive-rev-b0.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
11 /include/ "amd-seattle-soc.dtsi"
12 /include/ "amd-seattle-cpus.dtsi"
16 compatible = "amd,seattle-overdrive", "amd,seattle";
19 stdout-path = &serial0;
23 compatible = "arm,psci-0.2";
62 compatible = "mmc-spi-slot";
64 spi-max-frequency = <20000000>;
65 voltage-ranges = <3200 3400>;
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/linux/arch/arm/boot/dts/nxp/lpc/
H A Dlpc3250-phy3250.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * PHYTEC phyCORE-LPC3250 board
5 * Copyright (C) 2015-2019 Vladimir Zapolskiy <vz@mleia.com>
9 /dts-v1/;
13 model = "PHYTEC phyCORE-LPC3250 board based on NXP LPC3250";
22 compatible = "gpio-leds";
26 default-state = "off";
31 linux,default-trigger = "heartbeat";
37 power-supply = <&reg_lcd>;
41 remote-endpoint = <&cldc_output>;
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/linux/net/mac80211/
H A Ddebugfs_sta.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright 2003-2005 Devicescape Software, Inc.
6 * Copyright 2013-2014 Intel Mobile Communications GmbH
8 * Copyright (C) 2018 - 2023 Intel Corporation
17 #include "driver-ops.h"
26 struct sta_info *sta = file->private_data; \
28 format_string, sta->fiel
378 bool start, tx; sta_agg_status_do_write() local
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/linux/drivers/net/ethernet/intel/igc/
H A Digc_ptp.c1 // SPDX-License-Identifier: GPL-2.0
27 struct igc_hw *hw = &adapter->hw; in igc_ptp_read()
34 ts->tv_sec = sec; in igc_ptp_read()
35 ts->tv_nsec = nsec; in igc_ptp_read()
41 struct igc_hw *hw = &adapter->hw; in igc_ptp_write_i225()
43 wr32(IGC_SYSTIML, ts->tv_nsec); in igc_ptp_write_i225()
44 wr32(IGC_SYSTIMH, ts->tv_sec); in igc_ptp_write_i225()
51 struct igc_hw *hw = &igc->hw; in igc_ptp_adjfine_i225()
58 scaled_ppm = -scaled_ppm; in igc_ptp_adjfine_i225()
80 spin_lock_irqsave(&igc->tmreg_lock, flags); in igc_ptp_adjtime_i225()
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/linux/arch/arm/boot/dts/qcom/
H A Dqcom-apq8060-dragonboard.dts1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
2 #include <dt-bindings/input/input.h>
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/leds/common.h>
5 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
6 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h>
7 #include "qcom-msm8660.dtsi"
12 compatible = "qcom,apq8060-dragonboard", "qcom,msm8660";
19 stdout-path = "serial0:115200n8";
23 vph: regulator-fixed {
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/linux/drivers/comedi/drivers/
H A Drtd520.c1 // SPDX-License-Identifier: GPL-2.0+
6 * COMEDI - Linux Control and Measurement Device Interface
13 * Devices: [Real Time Devices] DM7520HR-1 (DM7520), DM7520HR-8,
14 * PCI4520 (PCI4520), PCI4520-8
16 * Status: Works. Only tested on DM7520-8. Not SMP safe.
24 * The PCI4520 is a PCI card. The DM7520 is a PC/104-plus card.
40 * These boards can support external multiplexors and multi-board
46 * Call them and ask for the register level manual.
71 * Analog-In supports instruction and command mode.
73 * With DMA, you can sample at 1.15Mhz with 70% idle on a 400Mhz K6-2
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/linux/drivers/net/ethernet/broadcom/bnx2x/
H A Dbnx2x_reg.h3 * Copyright (c) 2007-2013 Broadcom Corporation
13 * R - Read only
14 * RC - Clear on read
15 * RW - Read/Write
16 * ST - Statistics register (clear on read)
17 * W - Write only
18 * WB - Wide bus register - the size is over 32 bits and it should be
20 * WR - Write Clear (write 1 to clear the bit)
32 /* [RW 1] Initiate the ATC array - reset all the valid bits */
56 * BRB1_IND_FREE_LIST_PRS_CRDT+2 initialize parser initial credit. Warning -
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/linux/net/wireless/
H A Dnl80211.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * This is the new netlink-based wireless configuration interface.
5 * Copyright 2006-2010 Johannes Berg <johannes@sipsolutions.net>
6 * Copyright 2013-2014 Intel Mobile Communications GmbH
7 * Copyright 2015-2017 Intel Deutschland GmbH
8 * Copyright (C) 2018-2025 Intel Corporation
32 #include "rdev-ops.h"
50 NL80211_MCGRP_TESTMODE /* keep last - ifdef! */
74 int wiphy_idx = -1; in __cfg80211_wdev_from_attrs()
75 int ifidx = -1; in __cfg80211_wdev_from_attrs()
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