1*724ba675SRob Herring// SPDX-License-Identifier: GPL-2.0-or-later 2*724ba675SRob Herring/* 3*724ba675SRob Herring * PHYTEC phyCORE-LPC3250 board 4*724ba675SRob Herring * 5*724ba675SRob Herring * Copyright (C) 2015-2019 Vladimir Zapolskiy <vz@mleia.com> 6*724ba675SRob Herring * Copyright 2012 Roland Stigge <stigge@antcom.de> 7*724ba675SRob Herring */ 8*724ba675SRob Herring 9*724ba675SRob Herring/dts-v1/; 10*724ba675SRob Herring#include "lpc32xx.dtsi" 11*724ba675SRob Herring 12*724ba675SRob Herring/ { 13*724ba675SRob Herring model = "PHYTEC phyCORE-LPC3250 board based on NXP LPC3250"; 14*724ba675SRob Herring compatible = "phytec,phy3250", "nxp,lpc3250"; 15*724ba675SRob Herring 16*724ba675SRob Herring memory@80000000 { 17*724ba675SRob Herring device_type = "memory"; 18*724ba675SRob Herring reg = <0x80000000 0x4000000>; 19*724ba675SRob Herring }; 20*724ba675SRob Herring 21*724ba675SRob Herring leds { 22*724ba675SRob Herring compatible = "gpio-leds"; 23*724ba675SRob Herring 24*724ba675SRob Herring led0 { /* red */ 25*724ba675SRob Herring gpios = <&gpio 5 1 0>; /* GPO_P3 1, GPIO 80, active high */ 26*724ba675SRob Herring default-state = "off"; 27*724ba675SRob Herring }; 28*724ba675SRob Herring 29*724ba675SRob Herring led1 { /* green */ 30*724ba675SRob Herring gpios = <&gpio 5 14 0>; /* GPO_P3 14, GPIO 93, active high */ 31*724ba675SRob Herring linux,default-trigger = "heartbeat"; 32*724ba675SRob Herring }; 33*724ba675SRob Herring }; 34*724ba675SRob Herring 35*724ba675SRob Herring panel: panel { 36*724ba675SRob Herring compatible = "sharp,lq035q7db03"; 37*724ba675SRob Herring power-supply = <®_lcd>; 38*724ba675SRob Herring 39*724ba675SRob Herring port { 40*724ba675SRob Herring panel_input: endpoint { 41*724ba675SRob Herring remote-endpoint = <&cldc_output>; 42*724ba675SRob Herring }; 43*724ba675SRob Herring }; 44*724ba675SRob Herring }; 45*724ba675SRob Herring 46*724ba675SRob Herring reg_backlight: regulator-backlight { 47*724ba675SRob Herring compatible = "regulator-fixed"; 48*724ba675SRob Herring regulator-name = "backlight"; 49*724ba675SRob Herring regulator-min-microvolt = <1800000>; 50*724ba675SRob Herring regulator-max-microvolt = <1800000>; 51*724ba675SRob Herring gpio = <&gpio 5 4 0>; 52*724ba675SRob Herring enable-active-high; 53*724ba675SRob Herring regulator-boot-on; 54*724ba675SRob Herring }; 55*724ba675SRob Herring 56*724ba675SRob Herring reg_lcd: regulator-lcd { 57*724ba675SRob Herring compatible = "regulator-fixed"; 58*724ba675SRob Herring regulator-name = "lcd"; 59*724ba675SRob Herring regulator-min-microvolt = <1800000>; 60*724ba675SRob Herring regulator-max-microvolt = <1800000>; 61*724ba675SRob Herring gpio = <&gpio 5 0 0>; 62*724ba675SRob Herring enable-active-high; 63*724ba675SRob Herring regulator-boot-on; 64*724ba675SRob Herring }; 65*724ba675SRob Herring 66*724ba675SRob Herring reg_sd: regulator-sd { 67*724ba675SRob Herring compatible = "regulator-fixed"; 68*724ba675SRob Herring regulator-name = "sd"; 69*724ba675SRob Herring regulator-min-microvolt = <3300000>; 70*724ba675SRob Herring regulator-max-microvolt = <3300000>; 71*724ba675SRob Herring gpio = <&gpio 5 5 0>; 72*724ba675SRob Herring enable-active-high; 73*724ba675SRob Herring regulator-boot-on; 74*724ba675SRob Herring }; 75*724ba675SRob Herring}; 76*724ba675SRob Herring 77*724ba675SRob Herring&clcd { 78*724ba675SRob Herring max-memory-bandwidth = <18710000>; 79*724ba675SRob Herring status = "okay"; 80*724ba675SRob Herring 81*724ba675SRob Herring port { 82*724ba675SRob Herring cldc_output: endpoint { 83*724ba675SRob Herring remote-endpoint = <&panel_input>; 84*724ba675SRob Herring arm,pl11x,tft-r0g0b0-pads = <0 8 16>; 85*724ba675SRob Herring }; 86*724ba675SRob Herring }; 87*724ba675SRob Herring}; 88*724ba675SRob Herring 89*724ba675SRob Herring&i2c1 { 90*724ba675SRob Herring clock-frequency = <100000>; 91*724ba675SRob Herring 92*724ba675SRob Herring uda1380: uda1380@18 { 93*724ba675SRob Herring compatible = "nxp,uda1380"; 94*724ba675SRob Herring reg = <0x18>; 95*724ba675SRob Herring power-gpio = <&gpio 3 10 0>; 96*724ba675SRob Herring reset-gpio = <&gpio 3 2 0>; 97*724ba675SRob Herring dac-clk = "wspll"; 98*724ba675SRob Herring }; 99*724ba675SRob Herring 100*724ba675SRob Herring pcf8563: rtc@51 { 101*724ba675SRob Herring compatible = "nxp,pcf8563"; 102*724ba675SRob Herring reg = <0x51>; 103*724ba675SRob Herring }; 104*724ba675SRob Herring}; 105*724ba675SRob Herring 106*724ba675SRob Herring&i2c2 { 107*724ba675SRob Herring clock-frequency = <100000>; 108*724ba675SRob Herring}; 109*724ba675SRob Herring 110*724ba675SRob Herring&i2cusb { 111*724ba675SRob Herring clock-frequency = <100000>; 112*724ba675SRob Herring 113*724ba675SRob Herring isp1301: usb-transceiver@2c { 114*724ba675SRob Herring compatible = "nxp,isp1301"; 115*724ba675SRob Herring reg = <0x2c>; 116*724ba675SRob Herring }; 117*724ba675SRob Herring}; 118*724ba675SRob Herring 119*724ba675SRob Herring&key { 120*724ba675SRob Herring keypad,num-rows = <1>; 121*724ba675SRob Herring keypad,num-columns = <1>; 122*724ba675SRob Herring nxp,debounce-delay-ms = <3>; 123*724ba675SRob Herring nxp,scan-delay-ms = <34>; 124*724ba675SRob Herring linux,keymap = <0x00000002>; 125*724ba675SRob Herring status = "okay"; 126*724ba675SRob Herring}; 127*724ba675SRob Herring 128*724ba675SRob Herring&mac { 129*724ba675SRob Herring phy-mode = "rmii"; 130*724ba675SRob Herring use-iram; 131*724ba675SRob Herring status = "okay"; 132*724ba675SRob Herring}; 133*724ba675SRob Herring 134*724ba675SRob Herring/* Here, choose exactly one from: ohci, usbd */ 135*724ba675SRob Herring&ohci /* &usbd */ { 136*724ba675SRob Herring transceiver = <&isp1301>; 137*724ba675SRob Herring status = "okay"; 138*724ba675SRob Herring}; 139*724ba675SRob Herring 140*724ba675SRob Herring&sd { 141*724ba675SRob Herring wp-gpios = <&gpio 3 0 0>; 142*724ba675SRob Herring cd-gpios = <&gpio 3 1 0>; 143*724ba675SRob Herring cd-inverted; 144*724ba675SRob Herring bus-width = <4>; 145*724ba675SRob Herring vmmc-supply = <®_sd>; 146*724ba675SRob Herring status = "okay"; 147*724ba675SRob Herring}; 148*724ba675SRob Herring 149*724ba675SRob Herring/* 64MB Flash via SLC NAND controller */ 150*724ba675SRob Herring&slc { 151*724ba675SRob Herring status = "okay"; 152*724ba675SRob Herring 153*724ba675SRob Herring nxp,wdr-clks = <14>; 154*724ba675SRob Herring nxp,wwidth = <40000000>; 155*724ba675SRob Herring nxp,whold = <100000000>; 156*724ba675SRob Herring nxp,wsetup = <100000000>; 157*724ba675SRob Herring nxp,rdr-clks = <14>; 158*724ba675SRob Herring nxp,rwidth = <40000000>; 159*724ba675SRob Herring nxp,rhold = <66666666>; 160*724ba675SRob Herring nxp,rsetup = <100000000>; 161*724ba675SRob Herring nand-on-flash-bbt; 162*724ba675SRob Herring gpios = <&gpio 5 19 1>; /* GPO_P3 19, active low */ 163*724ba675SRob Herring 164*724ba675SRob Herring partitions { 165*724ba675SRob Herring compatible = "fixed-partitions"; 166*724ba675SRob Herring #address-cells = <1>; 167*724ba675SRob Herring #size-cells = <1>; 168*724ba675SRob Herring 169*724ba675SRob Herring mtd0@0 { 170*724ba675SRob Herring label = "phy3250-boot"; 171*724ba675SRob Herring reg = <0x00000000 0x00064000>; 172*724ba675SRob Herring read-only; 173*724ba675SRob Herring }; 174*724ba675SRob Herring 175*724ba675SRob Herring mtd1@64000 { 176*724ba675SRob Herring label = "phy3250-uboot"; 177*724ba675SRob Herring reg = <0x00064000 0x00190000>; 178*724ba675SRob Herring read-only; 179*724ba675SRob Herring }; 180*724ba675SRob Herring 181*724ba675SRob Herring mtd2@1f4000 { 182*724ba675SRob Herring label = "phy3250-ubt-prms"; 183*724ba675SRob Herring reg = <0x001f4000 0x00010000>; 184*724ba675SRob Herring }; 185*724ba675SRob Herring 186*724ba675SRob Herring mtd3@204000 { 187*724ba675SRob Herring label = "phy3250-kernel"; 188*724ba675SRob Herring reg = <0x00204000 0x00400000>; 189*724ba675SRob Herring }; 190*724ba675SRob Herring 191*724ba675SRob Herring mtd4@604000 { 192*724ba675SRob Herring label = "phy3250-rootfs"; 193*724ba675SRob Herring reg = <0x00604000 0x039fc000>; 194*724ba675SRob Herring }; 195*724ba675SRob Herring }; 196*724ba675SRob Herring}; 197*724ba675SRob Herring 198*724ba675SRob Herring&ssp0 { 199*724ba675SRob Herring num-cs = <1>; 200*724ba675SRob Herring cs-gpios = <&gpio 3 5 0>; 201*724ba675SRob Herring status = "okay"; 202*724ba675SRob Herring 203*724ba675SRob Herring eeprom: at25@0 { 204*724ba675SRob Herring compatible = "atmel,at25"; 205*724ba675SRob Herring reg = <0>; 206*724ba675SRob Herring spi-max-frequency = <5000000>; 207*724ba675SRob Herring 208*724ba675SRob Herring pl022,interface = <0>; 209*724ba675SRob Herring pl022,com-mode = <0>; 210*724ba675SRob Herring pl022,rx-level-trig = <1>; 211*724ba675SRob Herring pl022,tx-level-trig = <1>; 212*724ba675SRob Herring pl022,ctrl-len = <11>; 213*724ba675SRob Herring pl022,wait-state = <0>; 214*724ba675SRob Herring pl022,duplex = <0>; 215*724ba675SRob Herring 216*724ba675SRob Herring at25,byte-len = <0x8000>; 217*724ba675SRob Herring at25,addr-mode = <2>; 218*724ba675SRob Herring at25,page-size = <64>; 219*724ba675SRob Herring }; 220*724ba675SRob Herring}; 221*724ba675SRob Herring 222*724ba675SRob Herring&tsc { 223*724ba675SRob Herring status = "okay"; 224*724ba675SRob Herring}; 225*724ba675SRob Herring 226*724ba675SRob Herring&uart2 { 227*724ba675SRob Herring status = "okay"; 228*724ba675SRob Herring}; 229*724ba675SRob Herring 230*724ba675SRob Herring&uart3 { 231*724ba675SRob Herring status = "okay"; 232*724ba675SRob Herring}; 233*724ba675SRob Herring 234*724ba675SRob Herring&uart5 { 235*724ba675SRob Herring status = "okay"; 236*724ba675SRob Herring}; 237