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/freebsd/sys/contrib/device-tree/Bindings/mmc/
H A Dfsl-imx-esdhc.txt7 by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
10 - compatible : Should be "fsl,<chip>-esdhc", the supported chips include
11 "fsl,imx25-esdhc"
12 "fsl,imx35-esdhc"
13 "fsl,imx51-esdhc"
14 "fsl,imx53-esdhc"
15 "fsl,imx6q-usdhc"
16 "fsl,imx6sl-usdhc"
17 "fsl,imx6sx-usdhc"
18 "fsl,imx6ull-usdhc"
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H A Dfsl-imx-esdhc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/fsl-imx-esdhc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
13 - $ref: sdhci-common.yaml#
20 by mmc.txt and the properties used by the sdhci-esdhc-imx driver.
25 - enum:
26 - fsl,imx25-esdhc
27 - fsl,imx35-esdhc
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H A Dmarvell,xenon-sdhci.txt11 - compatible: should be one of the following
12 - "marvell,armada-3700-sdhci": For controllers on Armada-3700 SoC.
13 Must provide a second register area and marvell,pad-type.
14 - "marvell,armada-ap806-sdhci": For controllers on Armada AP806.
15 - "marvell,armada-ap807-sdhci": For controllers on Armada AP807.
16 - "marvell,armada-cp110-sdhci": For controllers on Armada CP110.
18 - clocks:
23 - clock-names:
28 - reg:
29 * For "marvell,armada-3700-sdhci", two register areas.
[all …]
H A Dmarvell,xenon-sdhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/marvell,xenon-sdhc
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx8ulp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8ulp-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-binding
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H A Dimx93.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx93-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gi
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H A Dimx8mn.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mn-clock.h>
7 #include <dt-bindings/power/imx8mn-power.h>
8 #include <dt-bindings/reset/imx8mq-reset.h>
9 #include <dt-binding
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H A Dimx8-ss-conn.dtsi1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright 2018-2019 NXP
7 #include <dt-bindings/clock/imx8-lpcg.h>
8 #include <dt-bindings/firmware/imx/rsrc.h>
10 conn_axi_clk: clock-conn-axi {
11 compatible = "fixed-cloc
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/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6ul-tqma6ul2.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2018-2022 TQ-Systems GmbH
4 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
8 #include "imx6ul-tqma6ul-common.dtsi"
9 #include "imx6ul-tqma6ulx-common.dtsi"
12 model = "TQ-Systems TQMa6UL2 SoM";
13 compatible = "tq,imx6ul-tqma6ul2", "fsl,imx6ul";
17 fsl,tuning-step = <6>;
38 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
55 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
H A Dimx6ul-tqma6ul2l.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2018-2022 TQ-Systems GmbH
4 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
8 #include "imx6ul-tqma6ul-common.dtsi"
9 #include "imx6ul-tqma6ulxl-common.dtsi"
12 model = "TQ-Systems TQMa6UL2L SoM";
13 compatible = "tq,imx6ul-tqma6ul2l", "fsl,imx6ul";
17 fsl,tuning-step = <6>;
38 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
55 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
H A Dimx7ulp.dtsi1 // SPDX-License-Identifier: GPL-2.0+
4 * Copyright 2017-2018 NXP
8 #include <dt-bindings/clock/imx7ulp-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gi
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H A Dimx6sll.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Copyright 2017-2018 NXP.
8 #include <dt-bindings/clock/imx6sll-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include "imx6sll-pinfunc.h"
14 #address-cells = <1>;
15 #size-cells = <1>;
46 #address-cells = <1>;
47 #size-cells = <0>;
[all …]
H A Dimx6ull-tqma6ull2.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2018-2022 TQ-Systems GmbH
4 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
8 #include "imx6ul-tqma6ul-common.dtsi"
9 #include "imx6ul-tqma6ulx-common.dtsi"
12 model = "TQ-Systems TQMa6ULL2 SoM";
13 compatible = "tq,imx6ull-tqma6ull2", "fsl,imx6ull";
17 fsl,tuning-step = <6>;
19 max-frequency = <99000000>;
20 assigned-clocks = <&clks IMX6UL_CLK_USDHC2_SEL>, <&clks IMX6UL_CLK_USDHC2>;
[all …]
H A Dimx6ull-tqma6ull2l.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2018-2022 TQ-Systems GmbH
4 * Author: Markus Niebel <Markus.Niebel@tq-group.com>
8 #include "imx6ul-tqma6ul-common.dtsi"
9 #include "imx6ul-tqma6ulxl-common.dtsi"
13 compatible = "tq,imx6ull-tqma6ull2l", "fsl,imx6ull";
17 fsl,tuning-step = <6>;
19 max-frequency = <99000000>;
20 assigned-clocks = <&clks IMX6UL_CLK_USDHC2_SEL>, <&clks IMX6UL_CLK_USDHC2>;
21 assigned-clock-parents = <&clks IMX6UL_CLK_PLL2_PFD2>;
[all …]
H A Dimxrt1050.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "../../armv7-m.dtsi"
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/imxrt1050-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
14 #size-cells = <1>;
18 compatible = "fixed-clock";
19 #clock-cells = <0>;
20 clock-frequency = <24000000>;
[all …]
H A Dimx7d-pico.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 /dts-v1/;
11 compatible = "pwm-backlight";
13 brightness-levels = <0 36 72 108 144 180 216 255>;
14 default-brightness-level = <6>;
24 compatible = "vxt,vl050-8048nt-c0
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H A Dimx7d-nitrogen7.dts1 // SPDX-License-Identifier: GPL-2.0 OR X11
6 /dts-v1/;
12 compatible = "boundary,imx7d-nitrogen7", "fsl,imx7d";
19 backlight-j9 {
20 compatible = "gpio-backlight";
21 pinctrl-names = "default";
22 pinctrl-0 = <&pinctrl_backlight_j9>;
24 default-on;
27 backlight_lcd: backlight-j20 {
28 compatible = "pwm-backlight";
[all …]
H A Dimx7s.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/clock/imx7d-clock.h>
7 #include <dt-bindings/power/imx7-power.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-binding
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H A Dimx6sx.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6sx-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gi
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H A Dimx7d-sdb.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 /dts-v1/;
11 compatible = "fsl,imx7d-sdb", "fsl,imx7d";
19 stdout-path = &uart1;
27 gpio-keys {
28 compatible = "gpio-keys";
29 pinctrl-names = "default";
30 pinctrl-
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H A Dimx7d-cl-som-imx7.dts2 * Support for CompuLab CL-SOM-iMX7 System-on-Module
4 * Copyright (C) 2015 CompuLab Ltd. - http://www.compulab.co.il/
7 * This file is dual-licensed: you can use it either under the terms
13 /dts-v1/;
18 model = "CompuLab CL-SOM-iMX7";
19 compatible = "compulab,cl-som-imx7", "fsl,imx7d";
23 reg = <0x80000000 0x10000000>; /* 256 MB - minimal configuration */
26 reg_usb_otg1_vbus: regulator-vbus {
27 compatible = "regulator-fixed";
28 regulator-name = "usb_otg1_vbus";
[all …]
H A Dimx6ul.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/clock/imx6ul-clock.h>
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/input.h>
8 #include <dt-bindings/interrupt-controller/arm-gi
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/freebsd/contrib/ntp/include/
H A Dicom.h10 #define P_TRACE 0x2 /* trace CI-V messges */
42 * CI-V frame codes
52 * CI-V controller commands
64 #define V_VFOM 0x0a /* memory -> vfo */
70 #define V_DIAL 0x10 /* set dial tuning step */
/freebsd/sys/contrib/device-tree/Bindings/net/
H A Dmicrel-ksz90x1.txt3 Some boards require special tuning values, particularly when it comes
8 Note that these settings are applied after any phy-specific fixup from
17 skew values actually increase in 120ps steps, starting from -840ps. The
28 -----------------------------------------------------
29 0 -840ps 0000
30 200 -720ps 0001
31 400 -600ps 0010
32 600 -480ps 0011
33 800 -360ps 0100
34 1000 -240ps 0101
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/freebsd/share/doc/papers/kerntune/
H A D3.t81 An Example of Tuning
83 The first step is to come up with a method for generating
148 step through a directory performing an operation on
157 For programs that step sequentially through a directory with
167 cache we ran ``ls \-l''
169 Before the per-process cache this command
195 Figure 4. Call times for \fInamei\fP with per-process cache.
225 then the per-process cache may still be useful in
234 using 10-44 kilobytes of physical memory.
237 After adding the system wide name cache we reran ``ls \-l''
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